ak4560a AKM Semiconductor, Inc., ak4560a Datasheet - Page 45
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ak4560a
Manufacturer Part Number
ak4560a
Description
16bit Codec With Alc And Mic/hp/spk-amps
Manufacturer
AKM Semiconductor, Inc.
Datasheet
1.AK4560A.pdf
(47 pages)
ASAHI KASEI
n FADEOUT Mode
In FADEOUT mode, the present IPGA value is decreased until the MUTE state when FDOUT bit changes from “0” to
“1”. This operation is always detected by the zero crossing operation.
If the large signal is input to the ALC1 circuit during the FADEOUT operation, the ALC1 limiter operation is done.
However a total time of the FADEOUT operation is the same time, even if the limiter operation is done. The period of
FADEOUT is set by FDTM1-0 bits, a number of step can be set by FDATT bit.
When FDOUT bit changes into “0” during the FADEOUT operation, the ALC1 operation start from the preset IPGA
value.
When FDOUT and ALC1 bits change into “0” at the same time, the FDOUT operation stops and the IPGA becomes the
value at that time.
NOTE: When FDIN and FDOUT bits are “1”, FDOUT bit is enabled.
(1) WR (FDOUT = “1”): The FADEOUT operation starts. Then ALC1 bit should be always “1”.
(2) FADEOUT time can be set by FDTM1-0 and FDATT bits.
(3) The FADEOUT operation is completed. The IPGA value is the MUTE state. If FDOUT bit is keeping “1”, the IPGA
(4) Analog and digital outputs mutes externally. Then the IPGA value is the MUTE state.
(5) WR (ALC1 = FDOUT = “0”): Exit the ALC1 and FADEOUT operations
(6) WR (IPGA): The IPGA value changes the initial value (exiting MUTE state).
(7) WR (ALC1 = “1”, FDOUT = “0”): The ALC1 operation restarts. But the ALC1 bit should not write until completing
(8) Release a mute function of analog and digital outputs externally.
MS0028-E-00
During the FADEIN operation, the zero crossing timeout period is ignored and becomes the same as the FADEIN
period.
value is keeping the MUTE state.
zero crossing operation of IPGA.
E.g. FDTM1-0 = 1024/fs @ fs =48kHz = 21.3ms, FDATT = 1step
(96 x FDTM1-0) / FDATT = 96 x 21.3ms / 1 = 2.04s
IPGA Output
ALC1 bit
FDOUT bit
Figure 36. Example for controlling sequence in FADEOUT operation
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[AK4560A]
2000/05