ak4554 AKM Semiconductor, Inc., ak4554 Datasheet
ak4554
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ak4554 Summary of contents
Page 1
... ASAHI KASEI Low Power & Small Package 16bit ∆Σ CODEC The AK4554 is a low voltage 16bit A/D & D/A converter for portable digital audio system. In the AK4554, the loss of accuracy form clock jitter is also improved by using SCF techniques for on-chip post filter. ...
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... ASAHI KASEI Ordering Guide −40 ∼ +85°C AK4554VT AKD4554 Evaluation Board for AK4554 Pin Layout VCOM 1 AINR 2 AINL 3 VSS 4 VDD 5 DEM0 6 DEM1 7 SDTO 8 Comparison with AK4550 Item AK4550 2.3 ∼ 3.6V Power Supply Voltage VCOM pin 0.45 x VDD ADC S/(N+D) (typ) 82dB ADC Input Resistance (typ) 100kΩ ...
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... Note: All input pins except analog input pins (AINR and AINL) should not be left floating. Handling of Unused Pin The unused I/O pins should be processed appropriately as below. Classification Pin Name Analog AINR, AINL, AOUTL, AOUTR SDTO Digital SDTI MS0325-E-01 PIN/FUNCTION Setting These pins should be open. This pin should be open. This pin should be connected to VSS [AK4554] 2005/08 ...
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... Note 1. All voltages with respect to ground. *AKM assumes no responsibility for the usage beyond the conditions in this datasheet. MS0325-E-01 ABSOLUTE MAXIMUM RATINGS Symbol min −0.3 VDD IIN - −0.3 VIN −40 Ta −65 Tstg Symbol min VDD 1 [AK4554] max Units 4.6 V ±10 mA VDD+0.3 V °C 85 °C 150 typ max Units 2.5 3.6 V 2005/08 ...
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... Note 5. In case of power-down mode, all digital input including clocks pins (MCLK, SCLK and LRCK) are held to VDD or VSS. PWADN and PWDAN pins are held to VSS. MS0325-E-01 ANALOG CHARACTERISTICS min - (Note 3) 1.35 40 (Note (Note 3) 1. (Note [AK4554] typ max Units - 16 Bits 0.2 0.5 dB 1.50 1.65 Vpp 70 - kΩ Bits ...
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... SB 25 ∆ 22. CHARACTERISTICS Symbol min VIH 70%VDD VIH 80%VDD VIL - VIL - VOH VDD−0.1 VOL - Iin - - 6 - [AK4554] typ max Units - 17.4 kHz 20.0 - kHz 21.1 - kHz - - kHz ±0 17.0 - 1/fs µ 3 20.0 kHz - kHz - - kHz ±0.02 - ...
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... MS0325-E-01 SWITCHING CHARACTERISTICS Symbol min fCLK 2.048 fCLK 2.048 dCLK Duty 45 tSCK 1/(96fs) tSCK 312.5 tSCKL 130 tSCKH 130 tLRS 50 tSLR 50 tDLR - tDSS - tSDH 50 tSDS 50 tPW 150 tPWV - - 7 - [AK4554] typ max Units - 38.4 MHz - 25.6 MHz - 60 % 44.1 50 kHz % - ...
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... Duty = tLRH 100 tSCK tSCKH tSCKL Figure 1. Clock Timing tLRS tDLR tSDS tSDH Figure 2. Serial Interface Timing tPW tPWV Figure 3. Reset & Initialize Timing - 8 - [AK4554] VIH VIL = tCLKL x fCLK x 100 VIH VIL = tLRL 100 VIH VIL VIH VIL VIH VIL tDSS ...
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... ASAHI KASEI System Clock Input The AK4554 can be input MCLK=256fs, 384fs, 512fs, 768fs or 1024fs (fs is equal to or lower than 25kHz when MCLK is 1024fs). The input clock applied to the MCLK pin as internal master clock is divided into 256fs automatically. When MCLK is 1024fs, oversampling rate of D/A converter is automatically changed from 128fs to 256fs. The relationship between the external clock applied to the MCLK input and the desired sample rate is defined in Table 1 ...
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... The de-emphasis is also disabled at DEM1 pin = “L” and DEM0 pin = “H”. DEM1 pin Digital High Pass Filter The AK4554 has a Digital High Pass Filter (HPF) for DC-offset cancel. The cut-off frequency of the HPF is 3.4Hz at fs=44.1kHz and the frequency response at 20Hz is −0.12dB. It also scales with the sampling frequency (fs). MS0325-E-01 ...
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... ASAHI KASEI Power-down & Reset The ADC and DAC of AK4554 are placed in the power-down mode by bringing each power down pin, PWADN, PWDAN = “L” independently and each digital filter is also reset at the same time. These resets should always be done after power-up. In case of the ADC, an anlog initialization cycle starts after exiting the power-down mode. Therefore, the output data, SDTO becomes available after 2081 cycles of LRCK clock ...
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... Capacitor value of VCOM depends on low frequency noise of supply voltage. MS0325-E-01 SYSTEM DESIGN 0.1u 1 VCOM AOUTR 16 2 AINR AOUTL 15 PWDAN 3 AINL 14 AK4554 PWADN 4 VSS 13 0.1u Top View 5 VDD SCLK 12 6 DEM0 MCLK 11 7 DEM1 LRCK 10 8 SDTO SDTI Analog Ground - 12 - [AK4554] Reset Reset Controller 9 System Ground 2005/08 ...
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... Vpp(typ). The ADC output data format is 2’s compliment. The AK4554 samples the analog inputs at 64fs. The digital filter rejects noise above the stop band except for multiples of 64fs. The AK4554 includes an anti-aliasing filter (RC filter) to attenuate a noise around 64fs. ...
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... VDD pin should be supplied from analog power supply on system, and VSS pin should be connected to analog ground on system. The AK4554 is placed on the analog ground plane, and near the analog ground and digital ground split. And analog and digital ground planes should be only connected at one point. The connection point should be near to the AK4554 ...
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... M Seating Plane NOTE: Dimension "*" does not include mold flash. Package & Lead frame material Package molding compound: Lead frame material: Lead frame surface treatment: MS0325-E-01 PACKAGE 0.65 Detail A 0.10 Epoxy Cu Solder (Pb free) plate - 15 - [AK4554] 1.05±0.05 0.17±0.05 0.1±0.1 0-10° 2005/08 ...
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... Date (YY/MM/DD) Revision Reason 04/07/28 00 First Edition 05/08/08 01 Spec Change MS0325-E-01 MARKING AKM 4554VT XXYYY Pin #1 indication 1) Date Code : XXYYY (5 digits) 2) XX: Lot# YYY: Date Code Marketing Code : 4554VT 3) Asahi Kasei Logo 4) Revision History Page Contents 7 Switching Characteristics tSCK(min): 312.5ns - 16 - [AK4554] 1/(96fs) or 312.5ns 2005/08 ...
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... AKM harmless from any and all claims arising from the use of said product in the absence of such notification. MS0325-E-01 IMPORTANT NOTICE - 17 - [AK4554] 2005/08 ...