ak4516a AKM Semiconductor, Inc., ak4516a Datasheet
ak4516a
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ak4516a Summary of contents
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... MSB first, MSB justified, IIS, LSB justified(only BICK=64fs correspondent) DAC: 16bit, MSB first, MSB justified, IIS, MSB justified 10 . Ta: - Power Supply: 2.5 3. Power Dissipation: 18mA 13 . 24pinVSOP (0.65mm Pitch) M0026-E-00 3V 16bit ADC&DAC with built-in PGA FEATURE 10k ) [AK4516A] AK4516A ...
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... ASAHI KASEI M0026-E- [AK4516A] 1998/08 ...
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... ASAHI KASEI Ordering Guide AK4516AVF AKD4516A Pin Layout M0026-E-00 C -20 +85 24pin VSOP(0.65mm Pitch) Evaluation Board - 3 - [AK4516A] 1998/08 ...
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... Rch analog output pin 22 VCML O Lch Common Voltage Output Pin, 0 Don't be connected with external circuit. 23 VCMR O Rch Common Voltage Output Pin, 0 Don't be connected with external circuit. 24 VCOM O Common Voltage Output Pin, 0 Don't be connected with external circuit. M0026-E-00 PIN/FUNCTION Function - 4 - [AK4516A] 1998/08 ...
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... Parameter Power Supplies Analog Digital Note 1 . All Voltage with respect to ground M0026-E-00 ABSOLUTE MAXIMUM RATING Symbol min VA -0.3 VD -0.3 VDA IIN VINA -0.3 VIND -0.3 Ta -20 Tstg -65 Symbol min VA 2 [AK4516A] max Units 6 ±10 mA VA+0.3 V VA+0 150 typ max Units 3.0 3 1998/08 ...
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... In case of the power-down mode, all digital input pins including clock(MCLK, BCLK, LRCK) pins are held VD or DGND. M0026-E-00 ANALOG CHARACTERISTICS min 1.53 25 LINE +8.0dB -28dB 0.1 -28dB -52dB 0.1 -52dB -60dB 0.1 -60dB -72dB 0 1. [AK4516A] typ max units 1.7 1.87 Vpp 0 Bits ...
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... For DAC, this time is from setting the 16 bit data of both channels on input register to the output of analog signal. M0026-E-00 FILTER CHARACTERISTICS Symbol min typ PB 0 19.0 20 22. 14.7 FR ±0 [AK4516A] max Units 16.5 kHz kHz kHz kHz dB ±0 20.0 kHz kHz kHz dB ±0.06 dB 1/fs dB 1998/08 ...
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... V - 30% 0 ±10 typ max Units 11.2896 12.8 MHz ns ns 16.9344 19.2 MHz ns ns 44.1 50 kHz 50 ...
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... ASAHI KASEI Timing Diagram M0026-E-00 Data Input Timing in WRITE - 9 - [AK4516A] 1998/08 ...
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... ASAHI KASEI M0026-E-00 Reset Timing - 10 - [AK4516A] 1998/08 ...
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... System Reset AK4516A should be reset once by bringing " " after exiting reset by MCLK. After the system reset operation, the all internal AK4516A registers are initial value. Zero detection When the input data at both channels are continuously zeros for 8192 LRCK cycles, DZF goes to "H". DZF immediately goes to " ...
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... M0026-E-00 SDTO(ADC) SDTI(DAC) MSB justified LSB justified LSB justified LSB justified MSB justified MSB justified compatible I S compatible Table 1 . Audio Data Format Figure 2. Audio Data Timing (No. [AK4516A] BCLK Figure 32fs Figure 1 RESET = 64fs Figure 2 32fs Figure 3 32fs Figure 4 1998/08 ...
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... ASAHI KASEI M0026-E-00 Figure 4. Audio Data Timing (No. [AK4516A] 1998/08 ...
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... CCLK always needs 16 edges of " " during inhibited. Reading/Writing of the control registers by except op0=op1="1" are invalid. op0- op2: Op- code (111:WRITE, 110:READ) A0- A4: D0- D7: M0026-E-00 CS ="L". Reading/Writing of the address except 00H 0DH are Address Control Data Figure 5 . Control Data Timing - 14 - [AK4516A] 1998/08 ...
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... ADC few noise occurs at the " Please mute the analog output externally if the noise influences the system application. 4 When the external clocks are stopped, the AK4516A should be in the power-down mode. Figure 6 .Power-up/Power-down Timing Example M0026-E-00 PD " of signal ...
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... Manual Mode The manual mode is used when the AK4516A mode is changed (for example, when the input pin or the De- emphasis etc setting is changed) or the recording level is adjusted from uP writing operation by manual. In case of the semi-auto or the full-auto modes impossible to set up a part of the register. ...
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... ASAHI KASEI 2. Semi-auto Mode The semi-auto mode is the mode that uses the AK4516A auto limitter function, and the recovery operation is processed DSP etc. During the semi-auto mode, writing to the following registers from uP is inhibited. LRGA, LTM1-0, ZELM, LMTH1-0, LMAT2-0 Figure 7 . Control example of semi-auto mode operation(LMAT = 1 step, ZENM=ZELM="1") 1 Setting up the registers for the semi-auto mode operation ...
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... ASAHI KASEI Figure 8 Register set-up sequence at Semi-auto mode M0026-E- [AK4516A] 1998/08 ...
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... ASAHI KASEI 3. Full-auto Mode The full-auto mode is done automatically by the auto limitter and the auto recovery function of the AK4516A. However, writing to the register is needed to enable these functions. During the full-auto mode, writing to the following registers from uP is inhibited. LRGA, LTM1-0, ZELM, LMTH1-0, LMAT2-0, WTM1-0, NRTM1-0, RATT1-0, ZENM, REF6-0, IPGL, IPGR Figure 9 . Control example of full-auto mode operation (LMAT=RATT: 1 step, ZENM=ZELM=" ...
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... ASAHI KASEI Figure 10 . Registers set-up sequence at Full-auto mode M0026-E- [AK4516A] 1998/08 ...
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... ZFIPR ZFIPL ROF2 ROF1 LMTE RCVE 0 LMTH1 LMTH0 LMAT2 LMAT1 LMAT0 LCDET IPGL6 IPGL5 IPGL4 LCDET IPGR6 IPGR5 IPGR4 IPGR3 IPGR2 IPGR1 IPGR0 REF6 REF5 REF4 Table 2 . AK4516A Register Map R [AK4516A ...
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... PM0-3 can be partially powered-down by ON/OFF of PM0-3. When all the circuit in AK4516A can be powered-down regardless of PM0-3. When PM0-3 go all "0", all the circuits in AK4516A can be also powered-down. When PM3 goes "1", input for output-AMP is selected to analog loopback circuit from DAC output. ...
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... ASAHI KASEI M0026-E-00 Figure 11 . Power Management - 23 - [AK4516A] 1998/08 ...
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... FS1-0:Select De-emphasis frequency The AK4516A includes the digital de-emphasis filter(tc=50/15us) by IIR filter. The filter corresponds to three sampling frequency (32kHz, 44.1kHz, 48kHz). The de-emphasis filter selected by FS0 and FS1 registers are enabled for input audio data. FS1 Table 4 ...
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... Zero crossing timeout(ZENM="1") 48kHz 44.1kHz 0 513/fs 10.7ms 11.6ms 1 1025/fs 21.4ms 23.2ms 0 2049/fs 42.7ms 46.5ms 1 4097/fs 85.4ms 92.9ms (NRTM1="1", NRTM0="0" at RESET [AK4516A LTM1 LTM0 ZELM R/W R/W R/W R 32kHz 16.0ms 32.0ms 64.0ms RESET 128.0ms 1998/08 ...
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... PLL6 PLL5 PLL4 PUL7 PUL6 PUL5 PUL4 PLR7 PLR6 PLR5 PLR4 PUR7 PUR6 PUR5 PUR4 - 26 - [AK4516A] (LTM1="1", LTM0="0"@RESET) Update period(ZELM="0") 48kHz 44.1kHz 32kHz 21us 23us 31us 42us 45us 63us 83us 91us 125us 167us 181us ...
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... ROF2 ROF1 ROF0 Threshold < -12.04dB -12.04dB -8.52dB -6.02dB -4.08dB -1.80dB -0.00dB Table 7 . Overflow Flag of Rch - 27 - [AK4516A ROF0 LOF2 LOF1 LOF0 pin. 1998/08 ...
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... These bits are reset on the following any conditions. PD pin="L" PM1="0" M0026-E-00 LOF2 LOF1 LOF0 Threshold <-12.04dB -12.04dB -8.52dB -6.02dB -4.08dB -1.80dB -0.00dB Table 8 . Overflow Flag of Lch - 28 - [AK4516A] 1998/08 ...
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... When the operation for attenuation is completed after the input signal becomes LMTH1-0 or less, auto limitter detection flag(LCDET) becomes "1". This flag become "0" when the input signal exceeds LMTH1-0 again and the AK4516A enters the auto limitter operation. During the auto limitter operation (LCDET=0), IPGA is changed according to the value set by the auto limitter operation. Therefore, uP writing operation is ignored. During semi-auto mode and after completing auto limitter operation(LCDET=" ...
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... Table 10 . Auto Limitter ATT Step Setting LCDET IPGL6 IPGL5 IPGL4 LCDET IPGR6 IPGR5 IPGR4 IPGR3 IPGR2 IPGR1 IPGR0 [AK4516A] 1 RESET IPGL3 IPGL2 IPGL1 IPGL0 R/W 30H PD pin. 1998/08 ...
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... These registers are reset by pin="L", then inhibits writing to these registers. These registers are reset by PM0="0". M0026-E-00 105 levels. 105 levels. GAIN(dB) STEP MIC LINE +28.0 +8.0 +27.5 +7.5 +27.0 +7 0.0 -20.0 0.5dB -0.5 -20 -7.5 -27.5 -8.0 -28.0 -9.0 -29.0 -10.0 -30 1dB -31.0 -51.0 -32.0 -52.0 -34.0 -54.0 -36.0 -56.0 2dB -38.0 -58.0 -40.0 -60.0 -44.0 -64.0 -48.0 -68.0 4dB -52.0 -72.0 MUTE MUTE Table 11 . Input Gain Setting CS pin [AK4516A] LEVEL 1998/08 ...
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... Timeout 48kHz 44.1kHz 512/fs 10.7ms 11.6ms 1024/fs 21.3ms 23.2ms 2048/fs 42.6ms 46.4ms 4096/fs 85.2ms 92.8ms RATT0 GAIN STEP RESET [AK4516A WTM1 WTM0 RATT1 RATT0 R/W R/W R/W R 32kHz 16.0ms 32.0ms 64.0ms RESET 128.0ms 1998/08 ...
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... Recovery Operation 1) 4 When the auto recovery operation is waiting for the next operation, the limitter operation is done from IPGA value at that time . (refer to Recovery Operation 2) PD This register is reset by pin = "L", then inhibits writing to this register. M0026-E- [AK4516A] 1998/08 ...
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... These bits are reset by pin ="L", then inhibits writing to these bits. M0026-E- REF6 REF5 REF4 REF3 RD R/W R/W R GAIN(dB) STEP MIC LINE +28.0 +8.0 +27.5 +7.5 +27.0 +7 0.0 -20.0 0.5dB -0.5 -20 -7.5 -27.5 -8.0 -28.0 -9.0 -29.0 -10.0 -30 1dB -31.0 -51.0 -32.0 -52.0 -34.0 -54.0 -36.0 -56.0 2dB -38.0 -58.0 -40.0 -60.0 -44.0 -64.0 -48.0 -68.0 4dB -52.0 -72.0 MUTE MUTE - 34 - [AK4516A REF2 REF1 REF0 R/W R/W R/W R LEVEL 1998/08 ...
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... When LOUT(ROUT) drives some capacitive load, some resistor should be added in series between LOUT(ROUT) and capacitive load. - The capacitor value on VCOM depends on low frequency noise level of power supply. M0026-E-00 SYSTEM DESIGN Figure 13 . Typical Connection Diagram 32fs or 64fs, MCLK=256fs or 384fs - 35 - [AK4516A] 1998/08 ...
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... VD is supplied from VA via 10 ohms resistor.(refer to Figure 13 ) System analog ground and digital ground should be connected together near to where the supplies are brought onto the printed circuit board. Decoupling capacitors should be as near to the AK4516A as possible, with the small value ceramic capacitor being nearest. ...
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... ASAHI KASEI 24pin VSOP (Unit: mm) NOTE: Dimension “*” does not include mold flash. Material & Lead finish Package molding compound: Lead frame material: Lead frame surface treatment: M0026-E-00 PACKAGE Epoxy Cu Solder plate - 37 - [AK4516A] 1998/08 ...
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... ASAHI KASEI M0026-E-00 MARKING Contents of AAXXXX AA: Lot# XXXX: Date Code - 38 - [AK4516A] 1998/08 ...
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IMPORTANT NOTICE These products and their specifications are subject to change without notice. Before considering any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor concerning their current status. AKM assumes no liability ...