ak7753 AKM Semiconductor, Inc., ak7753 Datasheet - Page 14

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ak7753

Manufacturer Part Number
ak7753
Description
Audio/hands Free Dsp With Stereo Codec
Manufacturer
AKM Semiconductor, Inc.
Datasheet
2) Reset
Note 32. The AK7753 can be powered up when INIT_RESET_N pin = “L”. The power supply must be ON and the
master clock must be input before the INIT_RESET_N pin transitions “H”.
3) Audio interface
Note 33. BITCLK_I “↑“ must not occur at the same time as SYNC_I edge.
Note 34. BITCLK_O “↑“ must not occur at the same time as SYNC_O edge.
(When control register SEL_BCK bit = “0”. The edge reverses when SEL_BCK bit = “1”.)
MS0697-E-00-PB
(Ta=-20°C~85°C; AVDD=DVDD=3.0~3.6V; CL=20pF)
Parameter
Slave Mode (CKM Mode 2-4)
Master Mode (CKM Mode 0-1)
BITCLK_O Frequency (BIT32FS bit = “0”)
BITCLK_O Frequency (BIT32FS bit = “1”)
BITCLK_O Duty Factor
Delay Time from BITCLK_I “↑” to SYNC_I
Delay Time from SYNC_I to BITCLK_I “↑”
Delay Time from SYNC_I,_O to Serial Data Output
Delay Time from BITCLK_I,_O to Serial Data Output
Serial Data Output Latch Setup Time
Serial Data Input Latch Hold Time
Delay Time from BITCLK_O “↑” to SYNC_O
Delay Time from SYNC_O to BITCLK_O “↑”
Delay Time from SYNC_O to Serial Data Output
Delay Time from BITCLK_O to Serial Data Output
Serial Data Output Latch Setup Time
Serial Data Input Latch Hold Time
(Ta=-20°C~85°C; AVDD=DVDD=3.0~3.6V)
INIT_RESET_N
CK_RESET_N
S_RESET_N
Parameter
(Note
32)
Symbol
tRST
tRST
tRST
(Note
(Note
(Note
(Note
33)
33)
34)
34)
- 14 -
Symbol
tBSIDH
tBSIDH
tBSIDS
tBSIDS
tBLRD
tLRBD
tBSOD
fBCLK
tBLRD
tLRBD
tBSOD
min
600
600
600
tLRD
tLRD
min
80
80
60
60
80
60
60
80
typ
typ
64
32
50
max
max
80
80
80
80
Units
Units
Ns
Ns
Ns
ns
ns
ns
ns
ns
ns
ns
ns
%
ns
fs
fs
ns
ns
ns
[AK7753]
2008/01

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