ak4101a AKM Semiconductor, Inc., ak4101a Datasheet - Page 23

• Manufacturer Part Number: ak4101a
• Description: Quad Outputs 192khz 24-bit Dit
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
n Register Definitions
MS0250-E-00
Addr
Addr
00H
01H
RSTN: Timing Reset.
MUTEN: Power Down and Mute for Asynchronous Mode.
CKS1-0: Master Clock Frequency Select. (See Table 1.)
DIF2-0: Audio Data Format. (See Table 3.)
CRCE: CRCC Enable at professional mode.
FS3-0: Sampling Frequency Select. (See Table 4 and Table 5.)
V1-4: Validity Flag for each channel.
Clock/Format Control
Validity/fs Control
Default
Default
Register Name
Register Name
R/W
R/W
0: Resets the internal frame and bit counters. Control registers are not initialized.
1: Normal operation. (Default)
0: Power Down Command. Control registers are not initialized.
1: Normal operation. (Default)
Default: “00” (Mode 0: MCLK=128fs)
CKS1-0 bits are logically ORed with CKS1-0 pins.
Default: “000” (Mode 0: 16bit right justified)
DIF2-0 bits are logically ORed with DIF2-0 pins.
0: CRCC is not generated.
1: CRCC is generated in professional mode. In consumer mode, CRCC is not generated. (Default)
Default: “0000” (“44.1kHz” in consumer mode; “Not defined” in professional mode. )
0: Valid (Default)
1: Invalid
TXP pin is “H” and TXN pin is “L”. In normal mode, BLS pin is “H”.
TXP and TXN pins are “L”. In normal mode, BLS pin is “H”.
V12 pin
0
0
0
0
1
1
1
1
CRCE
Table 8. V bit setting at asynchronous mode
R/W
R/W
V1 bit
D7
D7
V4
1
0
0
0
1
1
0
0
1
1
DIF2
R/W
R/W
D6
D6
V3
0
0
V2 bit
0
1
0
1
0
1
0
1
- 23 -
DIF1
R/W
R/W
D5
D5
V2
0
0
V bit on TX1
0
0
1
1
1
1
1
1
DIF0
R/W
R/W
D4
D4
V1
0
0
CKS1
R/W
R/W
FS3
D3
V bit on TX2
D3
0
0
0
1
0
1
1
1
1
1
CKS0
R/W
R/W
FS2
D2
D2
0
0
MUTEN
R/W
R/W
FS1
D1
D1
1
0
[AK4101A]
2003/07
RSTN
R/W
R/W
FS0
D0
D0
1
0