73k222al ETC-unknow, 73k222al Datasheet - Page 19

• Manufacturer Part Number: 73k222al
• Description: V.22, V.21, Bell 212a, Single-chip Modem
• Manufacturer: ETC-unknow

DYNAMIC CHARACTERISTICS AND TIMING
PARAMETER
Guard Tone Generator
Timing (Refer to Timing Diagrams)
* Control for setup is the falling edge of RD or WR.
NOTE: Asserting ALE, CS, and RD or WR concurrently can cause unintentional register accesses. When using
Tone Accuracy
Tone Level
(Below DPSK Output)
Harmonic Distortion
700 to 2900 Hz
TAL
TLA
TLC
TCL
TRD
TLL
TRDF
TRW
TWW
TDW
TWD
TCKD
TCKW
TDCK
TAC
TCA
TWH
Control for hold is the falling edge of RD or the rising edge of WR.
non-8031 compatible processors, care must be taken to prevent this from occurring when designing the
interface logic.
ADDR
CS
CONDITION
550 Hz
1800 Hz
550 Hz
1800 Hz
550 Hz
1800 Hz
CS/Address setup before ALE Low
CS hold after ALE low
Address hold after ALE low
ALE Low to RD/WR Low
RD/ WR Control to ALE High
Data out from RD Low
ALE width
Data float after RD High
RD width
WR width
Data setup before WR High
Data hold after WR High
Data out after EXCLK Low
WR after EXCLK Low
Data setup before EXCLK Low
Address setup before control*
Address hold after control*
Data Hold after EXCLK
(continued)
19
V.22, V.21, Bell 212A, 103
Single-Chip Modem
MIN
-4.0
-7.0
150
150
-20
12
10
10
15
50
50
15
12
50
50
20
0
0
0
NOM
-3.0
-6.0
73K222AL
MAX
+20
-2.0
-5.0
140
200
-50
-60
50
UNIT
Hz
dB
dB
dB
dB
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns