73k322l ETC-unknow, 73k322l Datasheet - Page 21

• Manufacturer Part Number: 73k322l
• Description: Ccitt V.23, V.22, V.21 Single-chip Modem
• Manufacturer: ETC-unknow

DYNAMIC CHARACTERISTICS AND TIMING PARALLEL CONTROL INTERFACE
PARAMETER
Guard Tone Generator
Timing (Refer to Timing Diagrams)
NOTE: Asserting ALE, CS, and RD or WR concurrently can cause unintentional register accesses. When using
BUS TIMING DIAGRAM (PARALLEL CONTROL MODE)
Tone Accuracy
Tone Level
(Below DPSK Output)
Harmonic Distortion
700 to 2900 Hz
TAL
TLA
TLC
TCL
TRD
TLL
TRDF
TRW
TWW
TDW
non-8031 compatible processors, care must be taken to prevent this from occurring when designing the
interface logic.
AD0-AD7
ALE
WR
RD
CS
CS
ADDR
TLL
ADDRESS
TAL
TLA
TLC
CONDITION
550 or 1800 Hz
550 Hz
1800 Hz
550 Hz
CS setup before ALE Low
Address setup before ALE low
CS /Address hold after ALE Low
ALE Low to RD / WR Low
RD / WR Control to ALE High
Data out from RD Low
ALE width
Data float after RD High
RD width
WR width
Data setup before WR High
TRD
TRW
READ DATA
TRDF
21
TCL
ADDRESS
CCITT V.23, V.22, V.21
MIN
-4.0
-7.0
200
140
-20
15
25
15
30
30
25
-5
TLC
Single-Chip Modem
NOM
-3.0
-6.0
TWW
WRITE DATA
TDW
MAX
+20
-2.0
-5.0
140
-50
90
TWD
UNIT
dB
dB
dB
Hz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns