msm9802 Oki Semiconductor, msm9802 Datasheet - Page 24

• Manufacturer Part Number: msm9802
• Description: Voice Synthesis Ic With Built-in Mask Rom
• Manufacturer: Oki Semiconductor

PIN DESCRIPTIONS
OKI Semiconductor
DIP
16-18
1-3
14
10
11
12
13
15
4
6
5
8
9
7
SOP
10-15
Pin
17
20
18
23
24
22
7
1
2
3
5
8
SSOP
13-18
21
25
23
29
30
28
10
8
1
2
3
6
OSC3/TEST
CPU/STD
Symbol
RESET
XT/CR
AOUT
OSC1
OSC2
I0 - I5
NAR
GND
V
V
ST
REF
DD
Type
—
—
O
O
O
O
I
I
I
I
I
I
I
The IC enters the standby state if this pin is set to “L” level. At
this time, oscillation stops and AOUT drives a current of 0 mA
and becomes GND level, then the IC returns to the initial state.
Apply a “L” pulse upon power-on.
This pin has an internal pull-up resistor.
Signal output pin that indicates whether the 6-bit LATCH (see
Block Diagram) is idle. NAR at “H” level indicates that the
LATCH is empty and ST input is enabled.
XT/CR switching pin. Set to “H” level if ceramic oscillation is
used.
Microcontroller interface/stand-alone mode switching pin. Set
to “H” level if the MSM9802/03/05 is used in microcontroller
interface mode.
Volume setting pin. If this pin is set to GND level, the maximum
current is forced in, and if set to V
is forced in. An approx. 10 k Ω pull-down resistor is internally
connected to this pin during operation.
Voice output pin.
The voice signals are output as current changes. In standby
state, this pin drives a current of 0 mA and becomes GND level.
Ground pin.
Power supply pin. Insert a bypass capacitor of 0.1 µF or more
between this pin and the GND pin.
Ceramic oscillator connection pin when ceramic oscillation is
selected. CR connection pin when CR oscillation is selected.
Input from this pin if external clock is used.
Ceramic oscillator connection pin when ceramic oscillation is
selected.
CR connection pin when CR oscillation is selected.
Leave this pin open if external clock is used.
Outputs “L” level in standby state.
Leave this pin open when ceramic oscillation is used.
CR connection pin when CR oscillation is selected.
Outputs “H” level in standby state when CR oscillation is
selected.
Voice synthesis starts at fall of ST, and addresses I0 to I5 are
fetched at rise of ST. Input ST when NAR, the status signal, is
at “H” level.
This pin has internal pull-up resistor.
Phrase input pins corresponding to playback sound.
Set to “L” level if CR oscillation is used.
Description
DD
level, the minimum current
MSM9802/03/05-xxx
FEDL9802-03-05-05
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