msm7502 Oki Semiconductor, msm7502 Datasheet
msm7502
Related parts for msm7502
msm7502 Summary of contents
Page 1
... CODEC, and the processor interface. The functions can be controlled via 8-bit data bus. For the CODEC of the MSM7502, an MSM7543 is used as a core CODEC, so the MSM7502 provides the available bit clock range wider than the family product MSM6895. ...
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... S-TONE GEN. WAMBLE TONE 1000 800 Hz 400 Latch VLCD GEN GEN. SCANNING OUTPUT DG SGT SGC PO0 to PO7 MSM7502 TO CAI – AIN SW 12 m/A PCMOUT CODEC AOUT PCMIN BCLOCK XSYNC RSYNC WRN RDN CEN RESETN AD0 ...
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... RMO1 9 10 RMO0 RMI 11 SPI SPO 14 RPO 15 R2I 16 R1I 17 MLDYI 18 MPBO 19 MPBI 20 MPAO MPAI connect pin 80-Pin Plastic QFP MSM7502 PI7 62 PI6 61 PI5 60 PI4 59 PI3 58 PI2 57 PI1 56 PI0 PO0 53 PO1 52 PO2 51 PO3 50 PO4 49 PO5 48 PO6 ...
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... Initially, the ringing tone volume is set at a maximum and the tone combination is set Wamble tone by a combination of 1 kHz and 1.3 kHz. If these pins are used with no-load, tone volume cannot be controlled. When tone volume control is required, a load resistor must be connected between SA0 and SA1. MSM7502 4/35 ...
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... During the whole system Power ON, the speech path from RMI to RMO0 and RMO1 is disconnected and the output of RMO0 and RMO1 is at the SG level (VA/2). The speech path is provided by processor control. A circuit example for adjustment of frequency characteristics Main amplifier gain without capacitors RPO RMI R1 C1 MSM7502 RMO0 5/35 ...
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... The typical gain between MLDYI and SPO is –3 dB. Through processor control, a gain between – – also settable steps. MLDYI is a high impedance input, so insert an about 100 kW bias resistor between MLDYI and SGT. for the load of 20 kW, SPO can not directly drive a speaker. PP MSM7502 6/35 ...
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... A signal on the MPBO is output via the TO pin through processor control. During the whole system power down mode, MPBO analog ground level. The gain between MPBO and TO is fixed to 0 dB. TPBI MSM7502 SGT 7/35 ...
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... TO signal is great, CAI should be connected via AC-coupling capacitor. At this time, insert an about 100 kW bias resistor between CAI and SGT. CAO is the analog output of CODEC. CAO should be connected to R1I via AC-coupling capacitor. A bias resistor is not required to R1I. During the whole system or CODEC power down mode, CAO is at the SG voltage level. MSM7502 8/35 ...
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... PCMOUT data is shifted out at the rising edge of the BCLOCK signal. PCMOUT is left open after eight bits are shifted or when PLL goes out of synchronization. PCMOUT also is left open through processor control. In addition, a digital path between PCMIN and PCMOUT is formed through processor control. PCMOUT needs a pull-up resistor because of its open-drain circuit. MSM7502 9/35 ...
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... INTT output DB0, DB1, DB2, DB3, DB4, DB5, DB6, DB7 Data bus inputs and outputs. These pins are configured as an output during the READ mode only and as an input during other modes < t < MSM7502 t < 10/35 ...
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... Controls of speaker pre-amplifier gain and additional speaker gain Controls of receive PAD and incoming tone input gain Key scanning output control Key scanning interrupt reset LCD deflection angle control voltage setting Power ON/OFF control CODEC control (Controls of companding law and digital loop) Key scanning data read-out MSM7502 11/35 ...
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... By processor control, VLCD outputs a DC voltage between 0 and 1 about 0.25 V step. This is used to control the deflection angle of the LCD display. VLCD has the internal resistance value of about 1 kW, so the external load of over 100 kW should be used. During initialized state, VLCD outputs the voltage MSM7502 12/35 ...
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... PCMOUT Condition TPAO, MPAO, MPBO, TO, RPO, SPO, CAO RMO0, RMO1 with respected to SG Level TPAO, MPAO, MPBO, TO, RPO, SPO, CAO RMO0, RMO1 TPAI, TPBI, MPAI MLDY R1I, R2I, SPI CAI MSM7502 Rating Unit - -55 to +150 ° ...
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... WRN WRN RDN AD0, AD1ÆWRN AD0, AD1ÆRDN WRNÆAD0, AD1 RDNÆAD0, AD1 See Fig.2 CENÆWRN CENÆRDN WRNÆCEN RDNÆCEN DB0 to 7ÆWRN WRNÆDB0 to 7 RESETN MSM7502 Min. Typ. Max. Unit kHz 6.0 8.0 10.0 kHz — ...
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... CAO, RPO, RMO0, RMO1, SPO — TPAI, TPBI, MLDYI, RMI, MPAI, MPBI R1I, R2I, SPI CAI (fin : < 4 kHz) — FORCE Current SINK Current PI0 to PI7 MSM7502 = 5 V ±5 –10°C to +70°C) DD Min. Typ. Max. Unit — 6.0 10.0 mA — ...
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... MSM7502 ( ±5 –10°C to +70°C) DD Min. Typ. Max. Unit 20 27 — –0.20 +0.07 +0.20 Reference dB –0.15 –0.03 +0.20 –0.15 +0.06 +0.20 0.0 0.38 0.80 –0.15 –0.03 +0 ...
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... Hz 72 kHz 300 to 0 4.6 kHz to 100 kHz 3400 fa = 470 –4 2fa– 320 kHz mV pp MSM7502 ( ±5 –10°C to +70°C) DD Min. Typ. Max. Unit –73.5 –70 — –71 –69 dBmOp — –78.0 –75 0.5671 ...
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... For –3 dB typical –6 dB setting –9 dB TPAI:Terminated in 510 W Measured at TO TPAO-TPBI Directly — — connected Set at typical gain *6 TPAO, TO, MPAO, MPBO 1020 — MSM7502 ( ±5 –10°C to +70°C) DD Min. Typ. Max. Unit 18.0 20.0 22.0 dB 15.7 17.7 19.7 dB –5.0 –3.0 –1.0 –8.0 – ...
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... RPO and SPO –4 dB –8 dB For –12 dB 1020 –4.0 typical –16 dB setting –20 dB –24 dB –28 dB Typical gain is set 1020 –4.0 between SPI and SPO MSM7502 ( ±5 –10°C to +70°C) DD Min. Typ. Max. Unit — –0.10 — dB — –179.6 — deg 3.6 — ...
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... Condition Level Setting 1 Level Setting 2 RPO Level Setting 3 Level Setting 4 RPO SPO 0 dB Gain SPO –10 dB Setting –20 dB MSM7502 ( ±5 –10°C to +70°C) DD Min. Typ. Max. Unit –8.0 –6.0 –4.0 –14.0 –12.0 –10.0 dB –20.0 –18.0 –16.0 – ...
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... To GND Condition WRÆLA, LB WRÆPO0 to PO7 Pull-up resistance : 10 kW RDÆDB0 to DB7 BCLOCKÆPCMOUT Pull-up resistance : 500 W MSM7502 ( ±5 –10°C to +70°C) DD Min. Typ. Max. Unit 3.25 4.0 — 0.73 1.28 1. 0.25 0.47 0.65 0.13 0.28 0. ±5 –10°C to +70°C) DD Min ...
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... PDCOD CODEC Transmit Timing CODEC Receive Timing Figure AW2 AR1 t t CW2 CR1 DW1 DW2 t PDDATA t PDSCN t PDLA Figure 2 MSM7502 AR2 t CR2 PDDATA 22/35 ...
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FUNCTIONAL DESCRIPTION Control Data Description Sounder and tone ON/OFF control WRITE Mode Address Data AD1 = 0, AD0 = 0 Control Data DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 ...
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Level and frequency control of sounder and R-tone WRITE Mode Address Data AD1 = 0, AD0 = 0 Control Data DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 — — — ...
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PB tone control WRITE Mode Address Data AD1 = 0, AD0 = 0 Control Data DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 ...
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SW control and timer reset WRITE Mode Address Data AD1 = 0, AD0 = 0 Control Data DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 ...
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Gain setting (receive gain, side tone gain) WRITE Mode Address Data AD1 = 0, AD0 = 1 Control Data DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 — ...
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Gain control (transmit hold tone, PB tone, microphone input, handset input) WRITE Mode Address Data AD1 = 0, AD0 = 1 Control Data DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 — — ...
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Gain control (receive PAD, speaker) WRITE Mode Address Data AD1 = 0, AD0 = 1 Control Data DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 — — 1 ...
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Key scanning signal output control WRITE Mode Address Data AD1 = 1, AD0 = 0 Controlo Data DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Output Data Key scanning data read out Read Mode Address Data AD1 = 1, AD0 ...
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Special functions WRITE Mode Address Data AD1 = 1, AD0 = 1 Contorol Data DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 LCD Deflection Angle Control Voltage Output ...
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V MPAI SGT 100 kW TPAI CAO R1I RPO RMI *2 RMO0 RMO1 SPO SPI SAO PO0 PO1 PO2 PO3 PO4 PO5 PO6 PO7 *1 Inserting a capacitor ( mF) between SGT and AG will ...
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TPAO TPBI MPAI MPAO VOL 9 TPAI + VOL 8 CAO R1I – VOL 10 R2I RPO RMI – SW5 – SW5 RMO0 0 dB RMO1 – SPO – – VOL 5 SW21 VOL 12 SW20 VOL ...
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... Connect analog input pins and digital input pins that are not used to the SG pin and to GND, respectively. • When the data is written differently from the data defined in the section, Control Data Description in FUNCTIONAL DESCRIPTION, normal device operation is not guaranteed. pin not lower than –0.3 V even instantaneously to avoid latch-up MSM7502 34/35 ...
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... Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). MSM7502 (Unit : mm) Package material Epoxy resin ...