msm7653 ETC-unknow, msm7653 Datasheet
msm7653
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msm7653 Summary of contents
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... The MSM7653 provides the optional functions such as Macrovision Rev. 7.01 (note 1) (note 2) and Closed Caption Signal Generation Function. The host interface provided conforms to Philips's I interconnections between this encoder and mounting components ...
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... Macrovision. Reverse engineering or disassembly is prohibited. (Note 2) This data sheet does not describe the register setting method of implementing Macrovision Corporation's anticopy function that this device provides. Refer to MACROVISION ANTICOPY FUNCTION SETTING MANUAL for the anticopy function. MSM7653 2/35 ...
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RESET_L OLC OLR YUV color OLG Generator OLB Y Level converter YD[7:0] U Level Prologue converter CD[7:0] Block V Level converter Anticopy Function Block VSYNC_L HSYNC_L Sync Generator & Timing Controller BLANK_L CLKX2 SEL[2:1] MS MODE CLKX1O CLKSEL Black & ...
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... Semiconductor PIN CONFIGURATION (TOP VIEW SDA 3 SCL 4 ADRS 5 RESET_L 6 MODE 7 OLC 8 OLR 9 OLG 10 OLB 11 CLKX1O 12 OUTSEL No-connection pin 56-Pin Plastic QFP MSM7653 SEL2 40 SEL1 39 CLKSEL 38 CD0 37 CD1 36 CD2 35 CD3 34 CD4 33 CD5 32 CD6 31 CD7 30 CLKX2 4/35 ...
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... V digital power supply Clock input pin (27 MHz) 8bit digital image chrominance signal data input pins (13.5 MHz mode). Level conforms to ITU-601. Fixed to "0" for ITU Rec. 656, 27 MHz-YCbCr mode. Operation mode select pin. "0" MHz mode / "1" : 13.5 MHz mode. MSM7653 5/35 ...
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... Reference voltage for DAC DAC full scale adjustment pin. DAC phase complement pin. Analog GND Analog color chrominance signal output pin. 3.3 V analog power supply Analog composite signal output pin. Analog GND Analog luminance signal output pin. 3.3 V analog power supply Digital GND MSM7653 6/35 ...
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... 3 3 output load = 37 3 Vrefex Ta = 25˚C Riadj (*2) R (*3) L and MSM7653 Rating Unit –0.3 to +4.5 V –0.3 to +4.5 –0 600 mW –55 to +150 °C Typ. Max. Unit 3.0 3.3 3.6 V 3.0 3.3 3.6 2.2 — — V — — 0.8 V ...
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... DV DD Symbol Condition T — — — — — Rpull_up = 4.7 kW C_SCL t Rpull_up = 4.7 kW H_SCL t Rpull_up = 4.7 kW L_SCL MSM7653 = 3.3 V ±0 3.3 V ±0 Typ. Max. Unit — — — — 0.4 V — +10 mA — +10 mA — 120 140 mA — ...
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... SCL Start Condition Data Line Stable: Data Valid Change of Data Allowed CLKX2 ts1 Invalid data th1 td1 valid data td2 C-bus basic input/output timing ACK t L_SCL t C_SCL C-bus Basic Input/Output Timing MSM7653 3-8 ACK Stop Condition t H_SCL 9/35 ...
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... It is determined by the level of the control signal (OLC, CR [2]), as shown below don't care OLC = x: Selects color bar signal (YUV Color Generator output signal OLC = 1: Selects overlay signal (YUV Color Generator output signal OLC = 0: Selects input image data. MSM7653 10/35 ...
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... This block performs upsampling at CLKX2 (double speed CLKX1) for luminance signals and chrominance signals modulated with CLKX1. Interpolation processing is executed in this process. • Closed Caption Block This block generates the signal for closed caption. • Anticopy Function Block This block generates a macrovision anticopy signal standard of Phillips Corporation. MSM7653 11/35 ...
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... White level 235 16 Y data Input luminance signal level Basic Pixel Sampling Ratio 4:2:2 is supported. CLKX1 YD CD Digital Level 240(112) 128(0) Black Level 16(–112) Input chrominance signal level Cb1 Cr1 Cb3 Cr3 Cb5 4:2:2 sampling at 8bit Y/8bit CbCr input MSM7653 C data Y6 Cr5 12/35 ...
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... RELATIONSHIP BETWEEN BLANK SIGNAL AND INPUT IMAGE DATA The blank signal is generated by the ITU Rec.656 standard input data. The input image data is valid when the blank signal is "H". Cb0 Y00 Cr0 Y01 Cb1 Y10 Cr1 Y11 VALID DATA Input Timing MSM7653 EAV(1st) EAV(2nd) EAV(3rd) EAV(4th) don't care 13/35 ...
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... Cb0, Y00, Cr0, Y01, Cb1, Y10, Cr1, Y11.... 4Tclkx2 63Tclkx1 (63Tclkx1) <Normal> 4Tclkx1 67Tclkx1 (67Tclkx1) <Colorstripe> (4Tclkx1) 127Tclkx1 (142Tclkx1) 711Tclkx1 (702Tclkx1) 136Tclkx1 (146Tclkx1) 127Tclkx1 (142Tclkx1) 711Tclkx1 (702Tclkx1) 8'h10 Y00 Y01 Y10 Y11 8'h80 Cb0 Cr0 Cb1 Cr1 1H MSM7653 1/2H 20Tclkx1 (20Tclkx1) 20Tclkx1 (20Tclkx1) 8'h10 8'h80 14/35 ...
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... VALID DATA Video data input timing are the same bit ( bit (CbCr) mode START In slave mode t (Ts) Operation mode STA 250 ITU 601 NTSC 280 ITU 601 PAL MSM7653 don't care period. ACT t (Ts) STA 260 290 15/35 ...
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... BLANK_L YD CD Input timing at 13.5 MHz in YCbCr format Invalid Data Invalid Data Cb0 Y00 t START Cb0 Invalid Data Invalid Data Y0 Invalid Data Cb0 t START MSM7653 Valid Data Cr0 Y01 Cb1 Y10 t ACT Y00 Cr0 Y01 Cb1 Valid Data Y1 Y2 Cr0 Cb1 t ACT ...
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... Semiconductor Internal Synchronization Output Timing Output timing of HSYNC_L and VSYNC_L in master mode is as follows. CLKX2 HSYNC_L VSYNC_L Output timing of internal synchronization, HSYNC_L and VSYNC_L VSYNC_L YA 523 Output timing of internal synchronization VSYNC_L t d1 524 525 MSM7653 17/35 ...
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... When the contents of 100% luminance order color bar are input into the encoder, the input level is as follows. Composite Wave Form (NTSC) DAC data Lumi (IRE) 957 133 775 100 715 89 610 70 549 59 450 41 390 30 338 20 285 11 266 7.5 224 0 114 –20 4 –40 NTSC Composite Signal (Setup 7.5) Yellow Green Red White Cyan Magenta MSM7653 Black Blue 18/35 ...
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... DAC data Lumi (IRE) 858 63 836 59 754 44 622 20 512 0 402 –20 270 –44 188 –59 166 –63 White Cyan Yellow NTSC Y Signal Output (Setup 0) Yellow Green Cyan Color Burst NTSC C Signal Output MSM7653 Magenta Blue Green Red Black Red Magenta Blue 19/35 ...
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... Y Wave Form (PAL) DAC data Lumi (IRE) 792 100 731 89 627 70 566 59 467 41 406 30 302 11 241 0 4 –43 Yellow Green White Cyan Magenta PAL Composite Signal White Cyan Yellow Green PAL Y Signal Output MSM7653 Red Black Blue Magenta Blue Red Black 20/35 ...
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... Semiconductor C Wave Form (PAL) DAC data Lumi (IRE) 858 63 836 59 754 44 630 21.5 512 0 394 –21.5 270 –44 188 –59 166 –63 Yellow Green Cyan Color Burst PAL C Signal Output MSM7653 Red Magenta Blue 21/35 ...
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... Burst relative –180° to B-Y axis Burst relative 180° to B-Y axis Output timing (Interlaced NTSC) MSM7653 22/35 ...
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... First equalizing pulse period (3H) B Vertical synchronization period (3H) C Second equalizing pulse period (3H) D Burst pause period E Vertical blanking period (20H) Odd field (Even field 6,259.5 to 262. 17,259.5 to 262.5H Output timing (Interlaced NTSC) MSM7653 Period 259.5 to 262. 23/35 ...
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... Continuous odd • even field 261 to 262H MSM7653 Period 261 to 6H 261 to 17H 24/35 ...
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... Output timing (Interlaced PAL) Field 1,5 Field 2,6 311 to 312.5H 311 to 312. 2. 2. 6,310 to 312. 5.5,308.5 to 312. 22.5,311 to 312. 22.5,311 to 312.5H Output timing (Interlaced PAL) MSM7653 ...
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... Continuous odd • even field MSM7653 Period 311 to 312H 1 to 2.5H 2 311 to 6H 311 to 22H 26/35 ...
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... Horizontal blanking period 63Ts 31Ts 71Ts 127Ts 838Ts 63Ts 31Ts 75Ts 142Ts 844Ts MSM7653 1/2H 31Ts 365Ts 64Ts 429Ts 32Ts 369Ts 63Ts 432Ts (synchronizing + blanking level) ¥ (1/3) (synchronizing + blanking level) ¥ (2/3) Total dots/1H 858 864 ...
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... ITU601 PAL 142Ts (Ts : sampling block period) Contents of color bar output timing setting Yellow Cyan Green Magenta 216Ts 305Ts 394Ts 483Ts 230Ts 318Ts 406Ts 494Ts MSM7653 Red Blue Black 572Ts 661Ts 750Ts 858Ts 582Ts 670Ts 757Ts 864Ts 28/35 ...
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... The read/write attribute of a register does not match "X" (read : 1/write : 0 control bit). The input timing is shown below. SDA MSB SCL Start Condition Data Line Stable: Data Valid Change of Data Allowed Data 0 Description ACK t L_SCL t C_SCL C-bus Basic Input/Output Timing MSM7653 A ..... Data 3-8 ACK Stop Condition t H_SCL 29/35 ...
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... ASCII code bits and the 7ODD parity bit. The first byte is multiplexed in cycles and the second byte is multiplexed in cycles 19 to 26, starting from LSB. Transition time Start Code 16-bit Information 6.0 ms 31.8 ms (reference) (reference) 61.7 ms (reference) Caption signal 100% 50% Transition time : ns Transition time MSM7653 50IRE 30/35 ...
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... Video mode select CR[4] Undefined CR[3] Interlace CR[2] Color bar CR[1:0] Overlay level MSM7653 Description Switching between the external terminal and internal register settings (for the operation mode External pin setting enabled 1 : Internal register setting enabled Chrominance signal input format *0 : Offset binary 1 : 2's complement Black level setup ...
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... MHz YCbCr Slave MHz YcbCr Master Sleep Mode x : don't care MSM7653 Description Closed caption function on/off control *0 : C.C. encoding off 1 : Odd field encoding Even field encoding Both field encoding on Closed caption data insertion line number setting NTSC : CCLN + 4 ...
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... The following shows the characteristics when the clock frequency is 27 MHz. 0 –20 –40 –60 –80 –100 0 2 (Note) The characteristics of these filters are based on design data Frequency [MHz Frequency [MHz] Up Sampling Filter Frequency Characteristic MSM7653 33/35 ...
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... Note: The termination converter analog output with a 37.5 W load eliminates need for an AMP 3 3.3 V 3.3 V MSM7653 DGND AGND + 3.6 mH – 150 W 164 pF 0.1 mF MSM7653 V Typ. 1.25 V REF 3 0 COMP LPF AMP YA R1 LPF AMP CVBSO R1 LPF ...
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... Semiconductor PACKAGE DIMENSIONS 56-Pin Plastic QFP MSM7653 (Unit : mm) 35/35 ...
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NOTICE 1. The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date. 2. The outline of action and examples for application ...