ml7214a-001 Oki Semiconductor, ml7214a-001 Datasheet - Page 31
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ml7214a-001
Manufacturer Part Number
ml7214a-001
Description
Voip Codec
Manufacturer
Oki Semiconductor
Datasheet
1.ML7214A-001.pdf
(44 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ML7214A-001
Manufacturer:
OKI
Quantity:
5 000
Company:
Part Number:
ml7214a-001TBZ03A-9
Manufacturer:
AGILENT
Quantity:
2 599
(2) Use of PCM interface
Setting Examples
• CR10=C0h (CH0/CH1 terminal interface: PCM I/F, VFRO0/VFRO1=AVREF)
• CR13=12h (Frame/16B/G.711 µ-law/10msec)
• Speech path switch setting
• CR6=03h, CR7=8Bh, CR8=00h, CR9=08h, CR1=80h
* When the decode output start offset time is 1 msec
• CR14=40h (G.711 µ-law)
• CR24=04h (G711_PLCEN=“1”)
• CR33=xxh, CR34=xxh, CR35=xxh, CR36=xxh, CR37=xxh, CR38=xxh
• Various settings
• CR0=61h(AFE0_PDN=AFE1_PDN=LONG/OPE_STAT=“1”)
• CR11=3Fh(PCMI0_EN=PCMI1_EN=PCMI2_EN=PCMI3_EN=PCMO0_EN=PCMO1_EN=“1”)
• CR24=ACh(SC_CH0aEN=SC_CH1aEN=DEC_OUTON=G711_PLCEN=“1”)
OKI Semiconductor
(ITS0, ITS1, ITS2, ITS3, OTS0, OTS1 slot specification)
CLK S E L
V FRO0
A V RE F
V FRO1
P CMO
A IN0N
A IN0P
A IN1N
S Y NC
GS X0
GS X1
P CMI
B CLK
X O
X I
A MP 3
A MP2
12.288MHz
10kΩ
10kΩ
P CM -IF
OS C
S /P
P /S
V RE F
10kΩ
A MP 0
10kΩ
A MP1
po
pi
po
pi
P LL
ITS 1U
OTS 1U
OTS 1L
OTS 0U
OTS 0L
ITS 1L
ITS 0U
ITS 0L
OTS 1_S E L
OTS 0_S E L
ITS 1_S E L
ITS 0_S E L
CK GN
TX THR0
TX THR1
RX THR1
RX THR0
(Caution) Functional res trictions on the CH 0 side
* Only one of FS K GE N0 and TGE N0 can be used at a time .
* It is prohibited to use the tone disable function
detection function (TONE , RX DE T 0/ TONE, TX DE T0) at the same time .
(Caution) Functional res trictions on the CH 1 side
* Only one of FS K GE N1 and TGE N 1 can be used at a time .
* It is prohibited to use the tone disable function
detection function (TONE , RX DE T 1/ TONE, TX DE T1) at the same time .
its0
ots0
its1
ots1
S Y NC(8kHz)
MCK
A /D0
D/ A0
A /D1
D/A 1
P CM CODE C(CH0)
P CM CODE C(CH1)
CODE C(CH0)
CODE C(CH1)
Linear P CM
Linear P CM
u-law/ A-law
u-law/ A-law
u-law/ A-law
u-law/ A-law
G. 711
G. 711
G. 711
G. 711
B P F
LP F
B P F
LP F
P DWN
CONT
(TD, RX DE T 0/TD, TX DE T0) and the tone
(TD, RX DE T 1/TD, TX DE T1) and the tone
S TGA IN_CH0
S TGA IN_CH1
CH1_IFS E L
CH0_IFS E L
CH1_IFS E L
CH0_IFS E L
fskdet
FDE T_S E L
P OWE R
FDE T_INIT _DIS CONT
DTMFDE T 0
fskdet
DTMFDE T1
TX DE T0
TONE_
TD_TX
TONE _
TX DE T 1
TD _TX
DE T 0
DE T1
Disable S tate
FSK_DET
S in
Rout
S in
Rout
E cho Canceller1
E c ho Canceller0
(E C1)
(E C0)
TONE _TX DE T 0
DTMF 0_DE T
DTMF 0_C[3: 0]
A NS_TX DE T 0
A NS P M _TX DE T 0
FDE T_RQ/FDE T_FE R
/FDE T_OE R
FDE T_D[7: 0]
TONE _TX DE T 1
DTMF1_DE T
DTMF1_C[ 3:0]
A NS_TX DE T 1
A NS P M _TX DE T 1
S out
S out
FS K GE N0
FS K GE N1
FGE N0_FLA G
FGE N1_FLA G
Rin
Rin
TE S T
TX GA IN_S C_CH0
TX GA IN_S C_CH1
TGE N1_E X FLA G
TGE N0_E X FLA G
RX S IG_CH1
RX S IG_CH0
TX S IG_CH0
TX S IG_CH1
T0
T1
TX GA IN_P CM1_CH1
TX GA IN_P CM0_CH1
S C_TX E N_CH1
TX GA IN_P CM1_CH0
S C_TX E N_CH0
TX GA IN_P CM0_CH0
TIME R
R1
TGE N1
R0
TGE N0
(Address: 038Bh Data: 0008h)
RX E N0_CH1
RX E N0_CH0
P CM0_CH1
P CM0_CH0
RX GA IN_
RX GA IN_
P CM_
P CM_
R0
T0
T 1
R1
S C_RX E N_CH0
S C_RX E N_CH1
P CM_TX E N1_CH1
P CM_TX E N0_CH1
P CM_TX E N1_CH0
P CM_TX E N0_CH0
RX GA IN_S C_CH0
RX S IG_CH0
RX S IG_CH1
RX GA IN_S C_CH1
P CM_
RX E N1_CH1
RX GA IN_
P CM1_CH1
RX GA IN_
P CM1_CH0
P CM_
RX E N 1_CH0
R0
R1
RX1aTX 1b_GA IN
RX0aTX 0b_GA IN
TX GA IN_CH1b
P CM_ITS 3U_E N
P CM_ITS 3L_E N
P CM_ITS 2U_E N
P CM_ITS 2L_E N
TX GA IN_CH0b
TX GA IN_CH1a
TX GA IN_CH0a
RX GA IN_ITS 2U
RX GA IN_ITS 2L
RX GA IN_ITS 3U
RX GA IN_ITS 3L
RX GA IN_CH1a
RX GA IN_CH1b
RX DE T 0
RX DE T1
RX GA IN_CH0a
RX GA IN_CH0b
u-law/A -law
u-law/ A-law
TD_RX
TONE _
TD_RX
TONE _
DE T0
DE T1
P CM CODE C(CH0)
P CM CODE C(CH1)
G. 711
G.711
S peec h CODE C(CH0)
S peec h CODE C(CH1)
RX 1bTX1a_GA IN
RX0bTX 0a_GA IN
u-law/A -law
u-law/A -law
u-law/A -law
u-law/A -law
P CM_TX E N_CH0
G. 711
G. 711
P CM_TX E N_CH1
G.711
G.711
u-law/A-law
u-law/A-law
u-law/A-law
u-law/A-law
G.711
G.711
G.711
G.711
A NS_RX DE T0
A NS P M _RX DE T0
TONE _RX DE T 0
A NS P M _RX DE T1
A NS_RX DE T 1
TONE _RX DE T 1
SC_CH0b_EN
SC_CH0a_EN
SC_CH0a_EN
SC_CH0b_EN
SC_CH1a_EN
SC_CH1b_EN
SC_CH1a_EN
SC_CH1b_EN
OTS 0_S E L
OTS 1_S E L
T
S
W
0
T
S
W
0
T
S
W
1
T
S
W
1
FEDL7214_001DIGEST-P
OTS 1U
OTS 0L
OTS 0U
OTS 1L
ITS 2U
ITS 3U
ITS 3L
ITS 2L
(Caution) Restric tions on functions common to CH 0/CH1
* When t he FS K detector (FS K , DE T ) is used, it is prohibited to use DTMF detec tor
0 (DTMFDE T 0) or DTMF detec tor 1 (DTMFDE T 1).
* When the DP GE N is used, it is prohibited to use the FS K generation function and
tone generation function of either channel .
(Caution)
A function whose use is prohibited or a function with restrictions is indicated by the
following s ymbol .
Restrictions
pi
pi
DP DE T 0_D[7: 0]
DP DE T 1_D[ 7:0]
its0
its 1
ots0
ots1
DP0_DE T
DP1_DE T
RX THR1
TX THR0
TX THR1
RX THR0
CH0
CH1
CH0
CH1
ML7214-001
DP GE N
DP DE T 0
DP DE T 1
GP IOA [2]
GP IOA [0]
GP IOA [1]
FRA ME/ DMA
(CR0-CR47)
Controller
TX -FIFO 0
TX -FIFO 1
RX -FIFO 0
RX -FIFO 1
FR0_CH0
FR0_CH1
FR1
Register
MCU-IF
Control
[ GP CR0
GP CR8]
GP IO
to
31/44
16b
4b
6b
8b
8b
A CK1B/
GP IOA[ 5]
A CK0B/
GP IOA[ 4]
FR1B
FR0B
WRB
RDB
CS B
D[ 15:0]
A[ 7:0]
GP IOA[ 3:0]
GP IOB[ 5:0]
GP IOC[7: 0]
INTB /
GP IOA[ 6]