wm8198scds-v Wolfson Microelectronics plc, wm8198scds-v Datasheet - Page 18

• Manufacturer Part Number: wm8198scds-v
• Description: 8 + 8 Bit Output 16-bit Cis/ccd Afe/digitiser
• Manufacturer: Wolfson Microelectronics plc

WM8198
OUTPUT FORMATS
w
The resultant signal V
The signal is then multiplied by the PGA gain. The PGA transfer characteristic varies with the value
of the PGAMODE register bit.
If PGAMODE = 0 (wide gain range PGA mode - default):
If PGAMODE = 1 (high resolution PGA mode):
ADC BLOCK: ANALOGUE-DIGITAL CONVERSION
The analogue signal is then converted to a 16-bit unsigned number, with input range configured by
PGAFS[1:0].
where the ADC full-scale range, V
OUTPUT INVERT BLOCK: POLARITY ADJUST
The polarity of the digital output may be inverted by control bit INVOP.
The digital data output from the ADC is available to the user in 8 or 4-bit wide multiplexed formats by
setting control bit MUXOP[1:0]. Latency of valid output data with respect to VSMP is programmable
by writing to control bits DEL[1:0]. The latency for each mode is shown in the Operating Mode Timing
Diagrams section.
Figure 15 shows the output data formats for Modes 1 – 2 and 4 – 6. Figure 16 shows the output data
formats for Mode 3. Table 2 summarises the output data obtained for each format.
PGA NODE: GAIN ADJUST
Figure 15 Output Data Formats
4+4+4+4-BIT
OUTPUT
OUTPUT
V
V
V
D
D
D
D
D
8+8-BIT
(Modes 1 − 2, 4 − 6)
MCLK
2
3
3
1
1
1
2
2
[15:0] = INT{ (V
[15:0] = INT{ (V
[15:0] = INT{ (V
[15:0] = D
[15:0] = 65535 – D
=
=
=
1
1
A
[15:0] ..............................................................(INVOP = 0) Eqn. 9
is added to the Offset DAC output.
A
V
V
V
B
1
2
2
3
3
3
+ {260mV ∗ (DAC[7:0]-127.5) } / 127.5 ..................... Eqn. 4
∗ 416/(566 - PGA[8:0]) ………................................... Eqn. 5a
∗ (1 + PGA[8:0]x4/511).............................................. Eqn. 5b
/V
/V
/V
C
1
FS
FS
FS
[15:0].................................................(INVOP = 1) Eqn. 10
B
) ∗ 65535} + 32767......... PGAFS[1:0] = 00 or 01 Eqn. 6
) ∗ 65535} ............................... PGAFS[1:0] = 11 Eqn. 7
) ∗ 65535} + 65535.................. PGAFS[1:0] = 10 Eqn. 8
FS
D
= 3V
Figure 16 Output Data Formats
4+4+4+4-BIT
OUTPUT
OUTPUT
(Mode 3)
8+8-BIT
MCLK
PD, Rev 4.3, August 2008
A B
A
A B
Production Data
C D
B
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