wm8152scds-v Wolfson Microelectronics plc, wm8152scds-v Datasheet - Page 20

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wm8152scds-v

Manufacturer Part Number
wm8152scds-v
Description
Single Channel 16-bit Cis/ccd Afe With 4-bit Wide Output
Manufacturer
Wolfson Microelectronics plc
Datasheet
WM8152
REFERENCES
POWER SUPPLY
POWER MANAGEMENT
OPERATING MODES
Table 4 WM8152 Operating Modes
w
MODE
1
2
3
4
Monochrome/
Colour Line-by-Line
Fast Monochrome/
Colour Line-by-Line
Maximum speed
Monochrome/
Colour Line-by-Line
Slow Monochrome/
Colour Line-by-Line
DESCRIPTION
The ADC reference voltages are derived from an internal bandgap reference, and buffered to pins
VRT and VRB, where they must be decoupled to ground. Pin VRX is driven by a similar buffer, and
also requires decoupling. The output buffer from the RLCDAC also requires decoupling at pin
VRLC/VBIAS when this is configured as an output.
The WM8152 can run from a 5V single supply or from split 5V (core) and 3.3V (digital interface)
supplies.
Power management for the device is performed via the Control Interface. The device can be powered
on or off completely by setting the EN bit low.
All the internal registers maintain their previously programmed value in power down mode and the
Control Interface inputs remain active.
Table 4 summarises the most commonly used modes, the clock waveforms required and the register
contents required for CDS and non-CDS operation.
AVAILABLE
CDS
Yes
Yes
Yes
No
SAMPLE
12MSPS
4MSPS
8MSPS
3MSPS
RATE
MAX
MCLK max = 24MHz
MCLK:VSMP ratio is
6:1
MCLK max = 24MHz
MCLK:VSMP ratio is
3:1
MCLK max = 24MHz
MCLK:VSMP ratio is
2:1
MCLK max = 24MHz
MCLK:VSMP ratio is
2n:1, n ≥ 4
REQUIREMENTS
TIMING
CONTENTS WITH
SetReg1: 0F(hex)
Identical to Mode
1 plus SetReg3:
bits 5:4 must be
set to 0(hex)
CDS not possible
Identical to
Mode 1
REGISTER
CDS
PD, Rev 4.3, August 2008
SetReg1: 0D(hex)
Identical to
Mode 1
SetReg1: 4D(hex)
Identical to
Mode 1
WITHOUT CDS
CONTENTS
REGISTER
Production Data
20

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