ml86v7655 Oki Semiconductor, ml86v7655 Datasheet - Page 5

• Manufacturer Part Number: ml86v7655
• Description: Ntsc/pal-compatible, 6ch Dac-equipped Digital Video Encoder With Format Conversion Function
• Manufacturer: Oki Semiconductor

PIN FUNCTION
OKI Semiconductor
Pin
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
1
2
3
4
5
6
7
8
9
NC
DVDD1
SDA
SCL
SLA
MS
DGND2
DVDD2
IMOD0
IMOD1
IMOD2
IPAL
IRGB
IPRG
I444
ORGB
OPRG
RESET_L
TEST0
TEST1
TEST2
TEST3
TEST4
CLKX2
DGND2
DVDD2
OCLKX1
VSYNC_L
HSYNC_L
BLANK_L
YD9
YD8
YD7
Symbol
Type
I/O
I/O
I/O
I/O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
No connection
I/O power supply (3.3 V)
Data pin for I
Data pin for I
I
Master/slave select pin
“1”: Master mode “0”: Slave mode
Core digital power supply (2.5 V)
Core digital power supply (2.5 V)
Input mode-0 control pin
Input mode-1 control pin
Input mode-2 control pin
PAL/NTSC mode select pin
RGB/YCbCr input select pin
Progressive/interlaced input select pin
4:2:2/4:4:4 select pin
RGB/YCbCr output select pin
Progressive output/interlaced output select pin
System reset pin. Reset at a “L” level.
Test mode control 0. Tie this pin to GND.
Test mode control 1. Tie this pin to GND.
Test mode control 2. Tie this pin to GND.
Test mode control 3. Tie this pin to GND.
Test mode control 4. Tie this pin to GND.
System clock input pin
Core digital GND
Core digital power supply (2.5 V)
CLKX1 output pin
Outputs 1/2-divided frequency of CLKX2
Vertical sync signal input-output pin
When in master mode: output; when in slave mode: input
Horizontal sync signal input-output pin
When in master mode: output; when in slave mode: input
BLANK signal input-output pin
When in master mode: output; when in slave mode: input
Video signal input pin; Brightness Y, G signal, bit[9]
Video signal input pin; Brightness Y, G signal, bit[8]
Video signal input pin; Brightness Y, G signal, bit[7]
2
“1”: PAL, “0”: NTSC
“1”: RGB input, “0”: YcbCr input
“1”: Progressive input, “0”: Interlaced input
“1”: 4:4:4 input, “0”: 4:2:2 input
“1”: RGB output, “0”: YcbCr output
“1”: Progressive output, “0”: /Interlaced output
C bus slave address least significant bit specification pin
2
2
C bus (5 V tolerant pin)
C bus (5 V tolerant pin)
Description
PEDL7655/56-000
ML86V7655/56
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