ml86v7668a Oki Semiconductor, ml86v7668a Datasheet - Page 22

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ml86v7668a

Manufacturer Part Number
ml86v7668a
Description
Ntsc/pal/secam Digital Video Decoder
Manufacturer
Oki Semiconductor
Datasheet

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Active Pixel Timing
Note: Where the FIFO mode is used in asynchronous sampling operations with fixed clock, the 1-field sampling
OKI Semiconductor
SECAM
NTSC
Video
mode
PAL/
Composite
Signal
HSYNC_L
HVALID
error accumulated in the line immediately following the fall of VVALID is reset. Therefore, the pixel count
for the line that was reset will change. In addition, where the condition of VTR and other signals is poor in
the FIFO-2 mode, the FIFO reset line might break in before the fall of VVALID.
In the above table, “V blank” indicates the line count during the “L” period of the VVALID signal, “Active
line” the line count during the “H” period of the VVALID signal, and “Total line” the line count in 1 field.
ITUR.601
ITUR.601
Sampling
Square
mode
pixel
pixel
Front porch
Video Modes and Pixel/Line Counts (at Standard Signal Input)
Note: Actually, there is an output delay of about 1.5H after video signal input.
12.272727
pixel rate
Output
(MHz)
13.5
13.5
Back porch
H blank
Hsync
porch
Front
16
22
12
Hsync
porch
Back
122
118
132
Total pixels (HSYNC_L)
Active pixels (HVALID)
Active Field
blank
138
140
144
H
H
Active
Total pixels
Active pixels
pixels
720
640
720
pixels
Total
858
780
864
Odd/20
Even/20
Odd/24
Even/25
V blank
Total line
Active line
(VVALID = H)
Odd/243
Even/242
Odd/288
Even/288
Active
line
V
FEDL86V7668A-01
60 pixels
Odd/262.5
Odd/312.5
Even/262.5
Even/312.5
ML86V7668A
Total line
22/32

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