mt8889csr1 Zarlink Semiconductor, mt8889csr1 Datasheet - Page 3

• Manufacturer Part Number: mt8889csr1
• Description: Integrated Dtmf Transceiver With Adaptive Micro Interface
• Manufacturer: Zarlink Semiconductor

Pin Description (continued)
1.0
The input arrangement of the MT8889C provides a differential-input operational amplifier as well as a bias source
(V
amp output (GS) for gain adjustment. In a single-ended configuration, the input pins are connected as shown in
Figure 3.
Figure 4 shows the necessary connections for a differential input configuration.
2.0
Separation of the low and high group tones is achieved by applying the DTMF signal to the inputs of two sixth-order
switched capacitor bandpass filters, the bandwidths of which correspond to the low and high group frequencies
(see Table 1). The filters also incorporate notches at 350 Hz and 440 Hz for exceptional dial tone rejection. Each
filter output is followed by a single order switched capacitor filter section, which smooths the signals prior to limiting.
Limiting is performed by high-gain comparators which are provided with hysteresis to prevent detection of
unwanted low-level signals. The outputs of the comparators provide full rail logic swings at the frequencies of the
incoming DTMF signals.
14-17 18-21 19-22
20
13
18
19
20
Ref
), which is used to bias the inputs at V
Input Configuration
Receiver Section
8, 9,
16,17
Pin #
24
15
22
23
24
3,5,10,
11,16,
23-25
28
18
26
27
28
IRQ/CP Interrupt Request/Call Progress (open drain) output. In interrupt mode, this output
Name
D0-D3
St/GT
V
ESt
NC
DD
goes low when a valid DTMF tone burst has been transmitted or received. In call progress
mode, this pin will output a rectangular signal representative of the input signal applied at
the input op-amp. The input signal must be within the bandwidth limits of the call
progress filter, see Figure 8.
Microprocessor data bus. High impedance when CS = 1 or DS =0 (Motorola) or RD = 1
(Intel). TTL compatible.
Early Steering output. Presents a logic high once the digital algorithm has detected a
valid tone pair (signal condition). Any momentary loss of signal condition will cause ESt
to return to a logic low.
Steering Input/Guard Time output (bidirectional). A voltage greater than V
at St causes the device to register the detected tone pair and update the output latch. A
voltage less than V
reset the external steering time-constant; its state is a function of ESt and the voltage on
St.
Positive power supply (5 V typical).
No Connection.
DD
/2. Provision is made for connection of a feedback resistor to the op-
Zarlink Semiconductor Inc.
MT8889C
TSt
frees the device to accept a new tone pair. The GT output acts to
3
Description
Data Sheet
TSt
detected