nw6003 Integrated Device Technology, nw6003 Datasheet - Page 7

• Manufacturer Part Number: nw6003
• Description: Type Ii Caller Id Decoder
• Manufacturer: Integrated Device Technology

NW6003 TYPE II CALLER ID DECODER
FSK DEMODULATION
demodulation. This function is implemented by several stages: first,
the carrier detector provides an indication of the presence of signal at
the bandpass filter output; second, the device’s dual mode serial
interface allows convenient extraction of the 8-bit data words in the
demodulated FSK bit stream.
specifications. The BT’s signal frequencies correspond to ITU-T V.23;
the Bellcore frequencies correspond to Bell 202. The CCA requires
that TE be able to receive both ITU-T V.23 and Bell 202 signals. The
NW6003 is compatible with both formats. It also meets the signal
characteristics by setting the input op amp at unity gain in 5 V
operation.
same frequency band as FSK, they will be demodulated and generate
false data. To avoid it, FSKEN pin is used to disable the FSK
modulation when FSK signal is not expected.
FSK CARRIER DETECTION
signal in the FSK frequency band. It detects the presence of a signal
of sufficient amplitude at the output of the FSK bandpass filter. If the
signal is qualified by a digital algorithm, the CD output becomes low to
indicate carrier detection. An 8 ms hysteresis is provided to allow for
momentary signal drop out once CD has been activated. And when
there is no activity at the FSK bandpass filter output for 8 ms, CD is
released.
demodulator is ignored by the FSK data output interface. In mode ‘0’,
the DATA pin is forced high. In mode ‘1’, the internal shift register is
not updated. No DR is generated. If DCLK is clocked, DATA is
undefined.
SERIAL FSK INTERFACE
FSK demodulation. The DATA pin is the serial data pin that outputs
data to external devices. The DCLK pin is the data clock which is
generated by an external device. The DR pin is the data ready signal,
also an output from the NW6003 to external devices. This interface
provides the mechanism to extract the 8-bit data words in the
demodulated FSK bit stream. Two modes are selectable via control of
the device’s MODE pin: Mode ‘0’ (MODE pin is low), where data
transfer is initiated by the NW6003; Mode ‘1’ (MODE pin is high),
where the data transfer is initiated by an external microcontroller.
The key part among the functions offered by NW6003 is FSK
The FSK characteristics are different in BT and Bellcore
The Dual Tone Alert Signal, speech and DTMF tones are in the
The carrier detector provides an indication of the presence of a
When CD is inactive (high), the raw output of the FSK
The three wire DATA, DCLK and DR form the data interface of the
Space Freq. (‘0’)
Mark Freq. (‘1’)
1300 Hz
2100 Hz
ITU-T V.23
± 1.5%
± 1.5%
1200 Hz
2200 Hz
Bell 202
± 1%
± 1%
7
Mode ‘0’
demodulates the incoming FSK signal, and output the data directly to
the DATA pin. Figure 24 shows the timing diagram of Mode ‘0’
operation.
Mode ‘1’
shift the 8-bit data words out of the NW6003, onto the DATA pin. The
NW6003 asserts DR to denote the word boundary and indicate to the
microprocessor that a new word has become available. Internal to the
device, the demodulated data bits are sampled and stored. After the
8th bit, the word is parallelly loaded into an 8-bit shift register and DR
goes low. The contents of shift register are shifted out to DATA pin on
DCLK’s rising edge with LSB (Least Significant Bit) out first. If DCLK
begins while DR is low, DR will return to high upon the first DCLK. This
feature allows the associated interrupt to be cleared by the first read
pulse. Otherwise, DR stays low for half a nominal bit time (1/2400 sec)
and then returns to high. After the last bit (Most Significant Bit) has
been read, additional DCLKs are ignored. Figure 22 shows the timing
diagram of Mode ‘1’ operation.
In this mode, data transfer is initiated by the NW6003. The device
In this mode, the microcontroller supplies read pulses (DCLK) to
INDUSTRIAL TEMPERATURE RANGE