92hd83 Integrated Device Technology, 92hd83 Datasheet - Page 67

• Manufacturer Part Number: 92hd83
• Description: Single Chip Pc Audio System Codec+speaker Amplifier+capless Hp+ldo
• Manufacturer: Integrated Device Technology

SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
92HD83
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
Field Name
Data1
Data0
Field Name
Rsvd
Mask2
Mask1
Mask0
Reg
Reg
Get
Set
Set
7.4.12. AFG (NID = 01h): GPIOEn
7.4.13. AFG (NID = 01h): GPIODir
Byte 4 (Bits 31:24)
Byte 4 (Bits 31:24)
Bits
1
Data for GPIO1. If this GPIO bit is configured as Sticky (edge-sensitive) input,
it can be cleared by writing "0". For details of read back value, refer to HD Audio
spec. section 7.3.3.22
0
Data for GPIO0. If this GPIO bit is configured as Sticky (edge-sensitive) input,
it can be cleared by writing "0". For details of read back value, refer to HD Audio
spec. section 7.3.3.22
Bits
31:3
Reserved.
2
Enable for GPIO2: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control
1
Enable for GPIO1: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control
0
Enable for GPIO0: 0 = pin is disabled (Hi-Z state); 1 = pin is enabled; behavior
determined by GPIO Direction control
Byte 3 (Bits 23:16)
Byte 3 (Bits 23:16)
R/W
RW
RW
R/W
R
RW
RW
RW
F1600h
Default
0h
0h
Default
00000000h
0h
0h
0h
67
Byte 2 (Bits 15:8)
Byte 2 (Bits 15:8)
Reset
POR - DAFG - ULR
POR - DAFG - ULR
Reset
N/A (Hard-coded)
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
92HD83
Byte 1 (Bits 7:0)
Byte 1 (Bits 7:0)
716h
717h
PC AUDIO
V 0.96 01/09