92hd90 Integrated Device Technology, 92hd90 Datasheet - Page 275

no-image

92hd90

Manufacturer Part Number
92hd90
Description
Single Chip Pc Audio System Codec+speaker Amplifier+capless Hp+ldo+i2s
Manufacturer
Integrated Device Technology
Datasheet
92HD90
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
IDT CONFIDENTIAL
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
.
verb F77/777
Register Address
SCLK[3:0]
0000
0001
0010
0100
0101
1000
1001
1010
0011
0110
0111
1011
1100
1101
1110
1111
Frequency
11.2896
12.288
5.6448
2.8224
16.128
7.29.1.3. AIC2 Register.
(MHz)
6.144
3.072
8.064
4.032
7.056
3.528
1.764
Auto
Auto
7
6:3
2:0
Bit
SCLK[3:0]
TRI
SR[2:0]
PLL clock
divisor
147/16
147/32
147/64
Auto
Auto
Label
10
20
40
14
28
16
32
64
7
sample rate
suggested
88.2KHz
88.2KHz
44.1KHz
88.2KHz
44.1KHz
44.1KHz
192KHz
192KHz
96KHz
48KHz
96KHz
48KHz
RW
RW
RW
Type Default
All
All
0
0000
100
clocks/fr
64/84
ame
275
128
64
64
64
64
64
64
84
84
84
80
80
40
TRI=1 & MS = 0 (Slave mode)
I2S_DOUT is hi-z (I2S_SCLK and I2S_LRCLK are inputs)
TRI=1 & MS = 1(Master mode)
I2S_DOUT, I2S_SCLK, and I2S_LRCLK are hi-z
SCLK rate
See table below
Sample Rate
000 = 44.1KHz
001 = 88.2KHz
010= Reserved
011 = Reserved
100 = 48KHz
101 = 96KHz
110 = 192KHz
111 = Reserved
SCLK is always 64Fs (48KHz based rates have jitter)
SCLK adjusts for sample rate. 44.1KHz based rates
are 64Fs and 48KHz based rates are 84Fs
High jitter (<5nS)
High jitter (<5nS)
High jitter (<5nS)
Description
reserved
reserved
Notes
V 0.91 10/10
92HD90

Related parts for 92hd90