bt8970 Mindspeed Technologies, bt8970 Datasheet - Page 54

• Manufacturer Part Number: bt8970
• Description: Single-chip Hdsl Transceiver
• Manufacturer: Mindspeed Technologies

4.0 Register
0x0D—Timer Enable Register (timer_enable)
Independent read/write enable bits, one for each of the eight internal timers. When any individual bit is set, the
corresponding timer is enabled for counting down from its current value toward zero. For the four symbol-rate
timers (meter, snr, t3, t4), counting will begin within one symbol period. For the four start-up timers (sut1-4),
counting will begin within 1,024 symbol periods. When an enable bit is cleared, the timer is disabled from
counting while it holds its current value. If an enable bit is set and then cleared before a count actually takes
place, no timer countdown will occur.
t4
t3
snr
meter
sut4
sut3
sut2
sut1
0x0E—Timer Continuous Mode Register (timer_continuous)
Independent read/write mode bits, one for each of the eight internal timers. When any individual bit is set, the
corresponding timer is placed in the continuous count mode. While in this mode, after reaching the zero count,
an enabled timer will reload the contents of its interval register and continue counting. When a mode bit is
cleared, the timer is taken out of the continuous mode. While in this configuration, after reaching the zero count,
an enabled timer will simply stop counting and remain at zero.
0x0F—Test Register (reserved2)
A 1-byte read/write register used for device testing by Rockwell. This register is automatically initialized to
0x00 upon RST assertion and initial power application. This register must be initialized according to the device
driver provided by Rockwell.
0x10, 0x11—Startup Timer 1 Interval Register (sut1_low, sut1_high)
A 2-byte read/write register stores the countdown interval for Startup Timer 1 in unsigned binary format. Each
increment represents 1,024 symbol periods. The contents of this register are automatically loaded into its
associated timer after the timer’s timer_restart bit is set, or after it counts down to zero while in the continuous
mode.
4-10
t4
t4
7
7
General Purpose Timer 4
General Purpose Timer 3
SNR Alarm Timer
Meter Timer
Startup Timer 4
Startup Timer 3
Startup Timer 2
Startup Timer 1
t3
t3
6
6
Preliminary Information/Conexant Proprietary and Confidential
snr
snr
5
5
meter
meter
4
4
Conexant
sut4
sut4
3
3
sut3
sut3
2
2
Single-Chip HDSL Transceiver
sut2
sut2
1
1
100101B
sut1
sut1
Bt8970
0
0