le87220 Zarlink Semiconductor, le87220 Datasheet - Page 11
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le87220
Manufacturer Part Number
le87220
Description
Worldwide Xdsl Dual Channel Line Driver
Manufacturer
Zarlink Semiconductor
Datasheet
1.LE87220.pdf
(14 pages)
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Transformer Turns Ratio
The transformer turns ratio N is restricted by the maximum peak differential signal at AY/BY pins, which must stay within the
Le87220 device's dynamic range. The output voltage range is typically equal to |V
The maximum peak voltage (across 100 Ω at TIP (A) and RING (B) leads of a FDM ADSL signal using 224 downstream carriers
for a combined rms power of 19.85 dBm and a peak-to-rms ratio of 5.8) is 36.05 V
across Z
be 39.15 V
be calculated as
The transformer turns ratio for a nominal battery voltage of –52 V is then N=2.45:1.
The Le87220 device is designed to operate with battery voltage in the range of –42 V to –72 V. The data transformer turns ratio
can be optimized for the specific battery voltage range, but the turns ratio must be limited to less than 2.7:1 secondary to primary
(where the primary side is connected to TIP (A) and RING (B)) if 19.85 dBm needs to be produced at the output. This limitation
is imposed by the Le87220 device internal bias levels.
Downstream Filtering
The input differential impedance (R
value external resistor R
A high-pass filter with a –3 dB corner frequency of
is formed by C
where
In addition to rejecting the low frequency signals from the data AFE, the input capacitors also block DC currents from flowing
between DDWNP/DDWNN and the data AFE outputs. With the recommended R
C
signal level.
1
= C
2
= 1.5 nF provides a corner frequency of around 25 kHz. Resistors R
SEC
PP
, this voltage must be scaled up by a factor of 1.086. The required peak differential signal at the AY/BY pins would
or 19.6 V
1
and C
2
PP
in conjunction with R
1
is used to set the differential input impedance (refer to the data path reference design).
per driver if the transformer had a 1:1 turn ratio. Using this information the transformer turns ratio can
Figure 3. Downstream Gain of the
25
20
15
10
5
0
10K
DDWN
) of the DDWNP/DDWNN pins can vary by as much as ± 30%, and consequently a lower
IN
to attenuate the low frequency noise of the downstream signal
R
C
100K
IN
Zarlink Semiconductor Inc.
f
IN
DWNHPF
N
= R
=
=
Frequency Hz
10
------------------- -
C
C
----------------------------- -
V
1
db(V
Z
1
+ R
BAT
+
LOOP
19.6V
⋅
11
=
C
C
11
LOOP
2
2
=100 ohms
--------------------------
2πR
–
.
+ (R
4V
/VTX)
Application Circuit, on page 8
1000K
1
IN
1
C
|| R
.
IN
10,
DDWN
R
11
1
)
BATmin
PP
value of 5.49 kΩ, R
and R
differential. To account for the voltage drop
10000K
| – 4 V.
1
can be used to adjust the downstream
10
= R
11
= 2.67 kΩ and