m21130 Mindspeed Technologies, m21130 Datasheet - Page 4

• Manufacturer Part Number: m21130
• Description: 68 X 68 3.2 Gbps Crosspoint Switch With Input Equalization
• Manufacturer: Mindspeed Technologies

21130-DSH-001-B, 3/27/03
Features
General Description
The M21130, designed for today’s demanding telecom and
datacom applications, is a low-power BiCMOS, high-speed
68 x 68 crosspoint switch with input equalization and built-in
system test features.
The device consumes as low as 8 Watts of power (typical at
2.5 V) with all channels operational. In addition, the PowerSca-
ler
ther reduce power consumption. Unused portions of the core
can be automatically (SmartPower
ing the operation of the remaining channels.
To improve signal quality, each input buffer is preceded by an
input equalizer (IE), which removes ISI jitter that is usually
caused by PCB skin effect losses. The IE circuit opens the input
data eye in applications where long PCB traces and cables are
used. The input equalizer can be enabled on a per channel ba-
sis.
The device supports data rates from 0 to 3.2 Gbps on each
channel, allowing any combination of SONET, Fibre Channel
(1x, 2x, 10x), InfiniBand, Gigabit Ethernet and 10 Gbps Ether-
net traffic.
Built-in system test features simplify design, verification, and
production testing of the system. The switch includes an on-
board 2
TX) and receiver (PRBS RX).
Three-stage switch fabrics with up to 2,313 x 2,313 ports, car-
rying up to 7.4 Terabits per second of traffic, can be designed
using this non-blocking switch, with multi-cast and broadcast
abilities.
All inputs and outputs are differential PCML (positive current
mode logic) with 2.5 V or 3.3 V supply.
TM
Low power consumption of 8 Watts at 2.5 V
Input equalizer on each channel to reduce deterministic
jitter (ISI), caused by board traces and cables (see
Figure
Supports any data rate from DC to 3.2 Gbps
Built-in PRBS Tx/Rx for system diagnostics
PowerScaler
tem needs
High-isolation design for low crosstalk jitter
Differential/single-ended high-speed data input/output
Non-blocking and broadcastable
features offer dynamically scalable switch settings to fur-
n
–1 pseudo-random bit sequence transmitter (PRBS
1)
TM
for further power reduction based on sys-
TM
) turned off, without affect-
68 x 68 3.2 Gbps Crosspoint Switch with Input Equalization
Mindspeed™ Technologies™
Applications
The M21130 is available in a 580-terminal, 35 mm, CDBGA
(Cavity Down Ball Grid Array) package, with a case tempera-
ture range of 0 ºC to 85 ºC, as shown in
Terminal functional descriptions are listed in
specifications are listed in
Figure 1
M21130 functional block diagram is illustrated in
Ordering Information
Part Number
Figure 1. Jitter Removal by Input Equalization
Large N x N cascaded switch fabrics, up to 7.4 Terabits/
second
DWDM Switches
Fiber-optic Telecom Systems (OC-48/OC-48 FEC)
Telecom & Datacom Switches
Storage Area Network (SAN) Switches (Fibre Channel,
2x Fibre Channel, and 10x Fibre Channel)
10 GbE parallel, GbE, and Infiniband networks
Packet Switching
High-speed Automated Test Equipment
M21130
shows jitter removal using input equalization. The
Table 2
580-terminal, 35 mm, CDBGA
Figure 1a, left, illustrates the
effect of 70” of stripline on a
clean 2.5 Gbps signal.
Package Type
through
Figure 9
Table
Figure 1b, below,
Table
input equalizer
M21130
and
reduction of
Figure
13.
illustrates
Page 4 of 34
1. Electrical
ISI jitter.
Figure
2.
10.