mt90868ag2 Zarlink Semiconductor, mt90868ag2 Datasheet - Page 13

• Manufacturer Part Number: mt90868ag2
• Description: 32,768 X 8,192 Channels High Bandwidth Digital Switch With Up To 128 Streams On Backplane And 128 Streams On Local And Data Rates From 8 To 32 Mbps
• Manufacturer: Zarlink Semiconductor

Data Sheet
Pin Description (continued)
AD24, AC24, AB26, AB25, AB24,
D17, C17, D16, C16, D15, C15,
W24, V24, U23, U24, T24, T23,
R24, R23, P23, P24, N24, N23,
E24, D26, D25, D24, C26, C25,
C24, C23, C22, C21, B22, B21,
A22, A21, D20, D19, D18, C18,
M24, M23, L23, L24, K24, K23,
D14, C14, C13, D13, D12, C12
K22, J24, J23, H24, E26, E25,
AA26, AA25, AA24, V23, Y24,
PBGA Ball Number
AD20- AD23
AE24
AE23
AE22
AF24
AF23
AF22
AD7
LCSTo0 - 3
LSTo0 - 63
FP16o
Name
C16o
FP8o
FP4o
ODE
C8o
C4o
Zarlink Semiconductor Inc.
Local Serial Output Streams 0 to 63 (5V Tolerant
Three-state Outputs): These outputs have data rates of
8.192 Mb/s with 128 channels per stream.
Local C16o Clock (3.3V Three-state Output): A
16.384MHz clock output. The clock falling edge is aligned
with the local frame boundary.
Local C8o Clock (3.3V Three-state Output): A
8.192MHz clock output. The clock falling edge is aligned
with the local frame boundary.
Local C4o Clock (3.3V Three-state Output): A
4.096MHz clock output. The clock falling edge is aligned
with the local frame boundary.
Local ST-Bus Frame Pulse Output (3.3V Three-state
Output): Local port ST-BUS frame pulse output which is
low for 61ns at the frame boundary. Its frequency is 8KHz.
Local CT-Bus Frame Pulse Output (3.3V Three-state
Output): Local port ST-BUS frame pulse output which is
low for 122ns at the frame boundary. Its frequency is
8KHz.
Local ST-Bus Frame Pulse Output (3.3V Three-state
Output): Local port ST-BUS frame pulse output which is
low for 244ns at the frame boundary. Its frequency is
8KHz.
Local Tristate Control Streams 0 to 3 (3.3V Three-state
Outputs): These pins are used for per-channel external
tristate control of the local output streams. The bit rate is
16.384MHz. When RESET pin or ODE pin is low, the
LCSTo0 - 3 are driven high.
Output Drive Enable (5V Tolerant Input): This is the
asynchronously output enable control for the BSTo0 - 63
and LSTo0 - 63 serial outputs. When it is high, the BSTo0
- 63, LSTo0 - 63 and LCSTo0-3 are enabled. When it is
low, the BSTo0 - 63 are tristated or driven high, the LSTo0
- 63 are tristated and the LCSTo0 - 3 are driven high.
Description
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