mt90870ag2 Zarlink Semiconductor, mt90870ag2 Datasheet - Page 41
mt90870ag2
Manufacturer Part Number
mt90870ag2
Description
Flexible 12 K Digital Switch F12kdx
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT90870AG2.pdf
(86 pages)
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For all data rates, the received serial data is converted to parallel format and stored sequentially in the data
memory. Each data memory location corresponds to an input stream and channel number. To provide constant
delay and maintain frame integrity, the MT90870 utilizes four pages of data memory. Consecutive frames are
written in turn to each page of memory. Reading is controlled to allow a channel data written in frame N to be read
during frame N+3.
A constant delay of three frames is applied to all switching paths irrespective of data-rate or channel number. See
Figure 16.
(32 Mb/s)
(16 Mb/s)
Data Delay Through the Switching Paths
(16 Mb/s)
(16 Mb/s)
(8 Mb/s)
(8 Mb/s)
(8 Mb/s)
(2 Mb/s)
(8 Mb/s)
(4 Mb/s)
BSTo1
BSTo1
LSTo1
LSTo1
LSTo1
BSTi0
BSTi0
BSTi0
LSTi0
LSTi0
FP8o
Figure 16 - Constant Switch Delay: Examples of Different Stream Rates and Routing
C
H
254
254
254
CH
CH
CH
C
H
127
127
127
127
CH
CH
CH
CH
CH
CH
31
63
C
H
255
255
255
CH
CH
CH
C
H
C
H
0
CH
CH
CH
Frame N
0
0
0
C
H
CH
CH
CH
CH
CH
CH
0
0
0
0
0
0
C
H
CH
CH
CH
1
1
1
C
H
Example showing Backplane to Backplane switching
Example showing Backplane to Local switching
Example showing Local to Local switching
Example showing Local to Backplane switching
Example showing 32 Mb/s mode, Backplane to Local switching
C
H
254
254
254
CH
CH
CH
C
H
127
127
127
CH
CH
127
CH
CH
CH
CH
31
63
C
H
255
255
255
CH
CH
CH
511
Zarlink Semiconductor Inc.
C
H
MT90870
Frames N+1 and N+2
41
C
H
CH
CH
CH
Frame N+3
0
0
0
C
H
CH
CH
CH
CH
CH
CH
0
0
0
0
0
0
C
H
CH
CH
CH
1
1
1
C
H
C
H
254
254
254
CH
CH
CH
C
H
127
127
127
CH
CH
127
CH
CH
CH
CH
31
63
C
H
255
255
255
CH
CH
CH
C
H
C
H
CH
CH
CH
Frame N+4
0
0
0
C
H
CH
CH
CH
CH
CH
CH
Data Sheet
0
0
0
0
0
0
C
H
CH
CH
CH
1
1
1
C
H
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