zl50015qcc1 Zarlink Semiconductor, zl50015qcc1 Datasheet - Page 83
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zl50015qcc1
Manufacturer Part Number
zl50015qcc1
Description
Enhanced 1 K Digital Switch With Stratum 4e Dpll
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50015QCC1.pdf
(122 pages)
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Note: [n] denotes output stream from 0 - 15.
15 - 12
External Read/Write Address: 0200
Reset Value: 0000
11 - 9
8 - 7
6 - 4
3 - 0
Bit
15
0
14
0
13
STOHZ[n]A2 - 0
(Valid only for STio0-7)
0
STO[n]DR3 - 0
STO[n]AD2 - 0
STO[n]FA1 - 0
H
Unused
12
0
Name
Table 45 - Stream Output Control Register 0 - 15 (SOCR0 - 15) Bits
STOHZ
[n]A2
11
H
- 020F
STOHZ
[n]A1
10
Reserved
In normal functional mode, these bits MUST be set to zero.
STOHZ Additional Advancement Bits
Output Stream[n] Fractional Advancement Bits
Output Stream[n] Bit Advancement Selection Bits
The binary value of these bits refers to the number of bits that the output stream
is to be advanced relative to FPo. The maximum value is 7. Zero means no
advancement.
Output Data Rate Selection Bits
H
STOHZ[n]A2-0
STO[n]FA1-0
STOHZ
101-111
[n]A0
9
000
001
010
100
00
01
10
011
11
Zarlink Semiconductor Inc.
STO[n]
FA1
8
ZL50015
STIN[n]DR3 - 0
0101 - 1111
STO[n]
FA0
0000
0001
0010
0100
83
0011
7
(2.048 Mbps, 4.096 Mbps,
(2.048 Mbps, 4.096 Mbps,
Additional Advancement
8.192 Mbps streams)
STO[n]
AD2
6
Advancement
8.192 Mbps)
Reserved
1/4 bit
2/4 bit
3/4 bit
1/4 bit
2/4 bit
3/4 bit
4/4 bit
Description
0 bit
STO[n]
0
AD1
5
(STOHZ driven high)
disabled: STio HiZ
STO[n]
AD0
4
16.384 Mbps
2.048 Mbps
4.096 Mbps
8.192 Mbps
Data Rate
Reserved
STO[n]
DR3
3
Additional Advancement
STO[n]
(16.384 Mbps streams)
(16.384 Mbps streams)
DR2
2
Advancement
Reserved
Reserved
STO[n]
2/4 bit
4/4 bit
DR1
0 bit
1
2/4
0
Data Sheet
STO[n]
DR0
0
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