zl50051gag2 Zarlink Semiconductor, zl50051gag2 Datasheet - Page 42
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zl50051gag2
Manufacturer Part Number
zl50051gag2
Description
8 K Channel Digital Switch With High Jitter Tolerance, Single Rate 8 Or 16 Mbps And 64 Input And 64 Output Streams
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50051GAG2.pdf
(67 pages)
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Table 16 illustrates the bit delay and sampling point selection.
LID4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Table 16 - Local Input Bit Delay and Sampling Point Programming Table
LID3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
LIDn
LID2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
LID1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Zarlink Semiconductor Inc.
ZL50051/3
LID0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
42
SMPL_MODE
Input Data
0 (Default)
Bit Delay
= LOW
1 1/4
1 1/2
1 3/4
2 1/4
2 1/2
2 3/4
3 1/4
3 1/2
3 3/4
4 1/4
4 1/2
4 3/4
5 1/4
5 1/2
5 3/4
6 1/4
6 1/2
6 3/4
7 1/4
7 1/2
7 3/4
1/4
1/2
3/4
1
2
3
4
5
6
7
Input Data
0 (Default)
Bit Delay
0
0
0
1
1
1
1
2
2
2
2
3
3
3
3
4
4
4
4
5
5
5
5
6
6
6
6
7
7
7
7
SMPL_MODE
= HIGH
Input Data
Sampling
Point
3/4
4/4
1/4
2/4
3/4
4/4
1/4
2/4
3/4
4/4
1/4
2/4
3/4
4/4
1/4
2/4
3/4
4/4
1/4
2/4
3/4
4/4
1/4
2/4
3/4
4/4
1/4
2/4
3/4
4/4
1/4
2/4
Data Sheet
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