zl50400 Zarlink Semiconductor, zl50400 Datasheet - Page 105
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zl50400
Manufacturer Part Number
zl50400
Description
Lightly Managed/unmanaged 9-port 10/100 M Ethernet Switch
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50400.pdf
(124 pages)
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12.3.10.10
CPU Address EAC
Accessed by CPU (RO)
12.3.10.11
CPU Address EAD
Accessed by CPU (R/W)
12.3.10.12
CPU Address EB0+n
Accessed by CPU (R/W)
Bit [0]:
Bit [1]:
Bits [4:2]:
Bit [5]:
Bit [6]:
Bit [7]:
Bit [0]:
Bit [1]:
Bit [2]:
Bit [3]:
Bits [7:4]:
Bit [0]:
Bit [1]:
Bit [2]:
Bit [3]:
Bit [4]:
Bit [5]:
Bit [6]:
Bit [7]:
PRTINTCTR
CLASSQOSST
QMCTRL0~9
Interrupt when source buffer low
Interrupt when no source buffer
Interrupt when UC congest
Interrupt when L1 WRED level
Interrupt when L2 WRED level
Interrupt when MC queue full
Interrupt when LHB timeout
Interrupt when no class buffer
No share buffer
No class 1 buffer
No class 2 buffer
No class 3 buffer
Reserved
Suspend port scheduling (no departure)
Reset queue
Reserved
Force out MAC control frame
Force out XOFF flow control frame
Force out XON flow control frame
Zarlink Semiconductor Inc.
ZL50400
105
Data Sheet
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