zl50407 Zarlink Semiconductor, zl50407 Datasheet - Page 95

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zl50407

Manufacturer Part Number
zl50407
Description
Lightly Managed/unmanaged 8-port 10/100m + 1-port 10/100/1000m Ethernet Switch
Manufacturer
Zarlink Semiconductor
Datasheet

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Part Number:
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Manufacturer:
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13.3.8
13.3.8.1
CPU Address 70C
Accessed by CPU (R/W) (Default 00)
13.3.8.2
CPU Address 700-705
Accessed by CPU (R/W)
13.3.8.3
CPU Address 706-70B
Accessed by CPU (R/W)
13.3.8.4
CPU Address 710
Accessed by CPU (R/W)
(Group 7 Address) Port Mirroring Group
Bit [3:0]:
Bit [4]
Bit [5]
Bit [6]:
Bit [7]:
DEST_MAC5
[47:40]
(Default 00)
SRC_MAC5
[47:40]
(Default 00)
Bit [2:0]:
Bit [3]:
Bit [6:4]:
Bit [7]:
MIRROR CONTROL – Port Mirror Control Register
MIRROR_DEST_MAC[5:0] – Mirror Destination MAC Address 0~5
MIRROR_SRC _MAC[5:0] – Mirror Source MAC Address 0~5
RMAC_MIRROR0 – RMAC Mirror 0
Source port to be mirrored
Mirror path
0: Receive
1: Transmit
Destination port for mirrored traffic
Mirror enable
Destination port to be mirrored to.
Mirror Flow from MIRROR_SRC_MAC[5:0] to MIRROR_DEST_MAC[5:0]
Mirror Flow from MIRROR_DEST_MAC[5:0] to MIRROR_SRC_MAC[5:0]
Mirror when address is destination
Mirror when address is source
DEST_MAC4
[39:32]
(Default 00)
SRC_MAC4
[39:32]
(Default 00)
DEST_MAC3
[31:24]
(Default 00)
SRC_MAC3
[31:24]
(Default 00)
Zarlink Semiconductor Inc.
ZL50407
95
DEST_MAC2
[23:16]
(Default 00)
SRC_MAC2
[23:16]
(Default 00)
DEST_MAC1
[15:8]
(Default 00)
SRC_MAC1
[15:8]
(Default 00)
DEST_MAC0
[7:0]
(Default 00)
SRC_MAC0
[7:0]
(Default 00)
Data Sheet

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