zl50411 Zarlink Semiconductor, zl50411 Datasheet - Page 72
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zl50411
Manufacturer Part Number
zl50411
Description
Managed 9-port Fast Ethernet Switch With Private Vlan
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50411.pdf
(143 pages)
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INT_REG
Interrupt sources
Bit #
[0]
[1]
[2]
[6:3]
[7]
CTL_FRAME_BUF1
Used to transmit/receive control frames
Bit #
16-bit or serial CPU Interface
[15:0]
Name
INT_CPU_FRAME
INT_CTL_BUF1
INT_CTL_BUF2
RSVD
INT_CHIP_RESET
Name
CTL_BUF1
Type
R
R
R
R
R
Type
W
R
Register Table 7 - 6, CTL_FRAME_BUF1
Register Table 6 - 5, INT_REG
Zarlink Semiconductor Inc.
Description
Ethernet frame interrupt. Ethernet Frame receive buffer has data
for processor to read
Control frame 1 interrupt. Control Frame receive buffer 1 has data
for processor to read
Control frame 2 interrupt. Control Frame receive buffer 2 has data
for processor to read
Reserved
Device Timeout Detected interrupt
Note: This bit is not self-cleared. After reading, the CPU has to
clear the bit writing 0 to it.
Description
Send control frame to command engine. Bits [7:0] is even byte,
[15:8] is odd byte.
Control frame format specified in Processor Interface application
note, ZLAN-26.
Receive control frame from command engine. Bits [7:0] is even
byte, [15:8] is odd byte.
Control frame format specified in Processor Interface application
note, ZLAN-26.
ZL50411
72
Default: N/A
Default: 00
8/16-bit
Width
Width
8-bit
Access
Access
R/W
R
Data Sheet
Address
Address
5
6
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