ftlx1841e2 Finisar Corporation., ftlx1841e2 Datasheet - Page 2

• Manufacturer Part Number: ftlx1841e2
• Description: Rohs-6 Compliant 10gb/s 1550nm Single Mode Datacom X2 Zr Transponder
• Manufacturer: Finisar Corporation.

FTLX1841 Product Specification – August 2008
I. Pin Descriptions
Signal Name
Management and Monitoring Ports
MDIO
MDC
PRTAD4
PRTAD3
PRTAD2
PRTAD1
PRTAD0
LASI
RESET
Vendor Specific
TX ON/OFF
MOD DETECT
Transmit Functions
Reserved
Reserved
TX LANE 3–
TX LANE 3+
TX LANE 2–
TX LANE 2+
TX LANE 1–
TX LANE 1+
TX LANE 0–
TX LANE 0+
© Finisar Corporation – August 2008 Rev. D1
Level
Open Drain
1.2 V
CMOS
1.2 V
CMOS
1.2 V
CMOS
1.2 V
CMOS
1.2 V
CMOS
1.2 V
CMOS
Open Drain
Open Drain
Open Drain
AC-coupled,
Internally biased
differential
XAUI
I/O
I/O
I
1
I
I
I
I
O
I
I
O
I
I
I
I
I
I
I
I
I
I
Pin No.
17
18
19
20
21
22
23
9
10
11,15,16,24
12
14
68
67
65
64
62
61
59
58
56
55
Pulled low inside transponder
Description
Management Data I/O. Requires
external 10 - 22 kΩ pull-up to the
APS on host.
Management Data Clock Input
Port Address Input bit 4
Port Address Input bit 3
Port Address Input bit 2
Port Address Input bit 1
Port Address Input bit 0
Link Alarm Status Interrupt Output.
Open Drain Compatible Output with
10 - 20 kΩ pull-up on host.
Logic high = Normal Operation
Logic low = Status Flag Triggered
Reset Input.
Open Drain Compatible Input with
22 kΩ pull-up to APS internal to
transponder.
Logic high = Normal Operation
Logic low = RESET
Vendor Specific Pins.
Leave unconnected when not used.
TX ON/OFF Input.
Open Drain Compatible Input with
22 kΩ pull-up to APS internal to
transponder.
Logic high = Transmitter On
Logic low = Transmitter Off
through a 1 kΩ resistor to Ground
Reserved For Future Use
Reserved For Future Use
Module XAUI Input Lane 3–
Module XAUI Input Lane 3+
Module XAUI Input Lane 2–
Module XAUI Input Lane 2+
Module XAUI Input Lane 1–
Module XAUI Input Lane 1+
Module XAUI Input Lane 0–
Module XAUI Input Lane 0+
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