89hpes32t8g2 Integrated Device Technology, 89hpes32t8g2 Datasheet - Page 2

• Manufacturer Part Number: 89hpes32t8g2
• Description: 32-lane 8-port Pcie Gen2 I/o Expansion Switch
• Manufacturer: Integrated Device Technology

IDT 89HPES32T8G2 Product Brief
– Supports D0, D3hot and D3 power management states
– Active State Power Management (ASPM)
– Supports PCI Express Power Budgeting Capability
– SerDes power savings
– ECRC support
– AER on all ports
– SECDED ECC protection on all internal RAMs
– End-to-end data path parity protection
– Checksum Serial EEPROM content protected
– Autonomous link reliability (preserves system operation in the
– Ability to generate an interrupt (INTx or MSI) on link up/down
– On-chip link activity and status outputs available for Port 0
– Per port link activity and status outputs available using
– SerDes test modes
– Supports IEEE 1149.6 AC JTAG and IEEE 1149.1 JTAG
– Requires only two power supply voltages (1.0 V and 2.5 V)
– No power sequencing requirements
Power Management
9 General Purpose I/O
Reliability, Availability and Serviceability (RAS)
Test and Debug
Power Supplies
Packaged in a 23mm x 23mm 484-ball Flip Chip BGA with
1mm ball spacing
• Supports L0, L0s, L1, L2/L3 Ready and L3 link states
• Configurable L0s and L1 entry timers allow performance/
• Supports low swing / half-swing SerDes operation
• SerDes optionally turned-off in D3hot
• SerDes associated with unused ports are turned-off
• SerDes associated with unused lanes are placed in a low
presence of faulty links)
transitions
(upstream port)
external I
power-savings tuning
power state
2
C I/O expander for all other ports
2 of 3
September 25, 2008