m4-128n-64-10ai Lattice Semiconductor Corp., m4-128n-64-10ai Datasheet - Page 17

• Manufacturer Part Number: m4-128n-64-10ai
• Description: High Performance E Cmos In-system Programmable Logic
• Manufacturer: Lattice Semiconductor Corp.

PAL Block Clock Generation
Each MACH 4 device has four clock pins that can also be used as inputs. These pins drive a
clock generator in each PAL block (Figure 14). The clock generator provides four clock signals
that can be used anywhere in the PAL block. These four PAL block clock signals can consist of
a large number of combinations of the true and complement edges of the global clock signals.
Table 12 lists the possible combinations.
Note:
1. M4(LV)-32/32 and M4(LV)-64/32 have only two clock pins, GCLK0 and GCLK1. GCLK2 is tied to GCLK0, and GCLK3 is tied to
Figure 12. MACH 4 with 2:1 Macrocell-I/O Cell Ratio
GCLK1.
- Input Switch Matrix
GCLK2
GCLK3
GCLK1
GCLK0
Figure 14. PAL Block Clock Generator
From Input Cell
17466G-002
MACH 4 Family
Figure 13. MACH 4 with 1:1 Macrocell-I/O Cell Ratio
Block CLK2
(GCLK2 or GCLK3)
Block CLK0
(GCLK0 or GCLK1)
Block CLK1
(GCLK1 or GCLK0)
Block CLK3
(GCLK3 or GCLK2)
- Input Switch Matrix
1
17466G-003
17466G-004
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