ml50000 Oki Semiconductor, ml50000 Datasheet - Page 6

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ml50000

Manufacturer Part Number
ml50000
Description
Echo Canceler
Manufacturer
Oki Semiconductor
Datasheet
¡ Semiconductor
(2/5)
28-pin
SSOP
10
5
6
7
8
9
Pin
56-pin
QFP
10
5
6
7
8
9
Symbol
IRLD
SCK
ATT
SIN
RIN
INT
Type
O
I
I
I
I
I
Control for the ATT function.
This pin prevents howling by attenuators (ATT) for the RIN input and SOUT
output.
If there is input only to RIN, the ATT for the SOUT output is activated.
If there is no input to SIN, or if there is input to both SIN and RIN, the ATT
for the RIN input is activated.
Either the ATT for the RIN output or the ATT for the SOUT is always
activated in all cases, and the attenuation of ATT is 6 dB.
This input signal is loaded in synchronization with the falling edge of the
INT signal or the rising edge of the RST signal.
Interrupt signal which starts 1 cycle (8 kHz) of the signal processing.
Signal processing starts when "H"-to-"L" transition is detected.
INT input is invalid for 100 ms after reset due to initialization.
Refer to the control pin connection example.
Load detection signal output when the SIN and RIN serial input data is
loaded in the internal registers.
Refer to the control pin connection example.
Transmit serial data.
Input the PCM signal synchronized to SYNC and SCK. Data is read in at
the falling edge of SCK.
Receive serial data.
Input the PCM signal synchronized to SYNC and SCK. Data is read at the
falling edge of SCK.
Clock input for transmit/receive serial data.
This pin uses the external SCK or the SCKO.
Input the PCM CODEC transmit/receive clock (64 to 2048 kHz).
• Single Chip or Master Chip in a Cascade Connection
• Slave Chip in a Cascade Connection
• Single Chip or Master Chip in a Cascade Connection
• Slave Chip in a Cascade Connection
• Single Chip
• Master Chip in a Cascade Connection
"H": ATT OFF
"L": ATT ON
"L" is recommended if performing echo cancellation.
Fixed at "L"
Connect the IRLD pin.
Connect the IRLD pin of the master chip.
Connect to the INT pin.
Connect to the INT pin of the master chip and all the slave chips.
• Slave Chip in a Cascade Connection Leave open.
Description
ML50000
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