ttsv02622 ETC-unknow, ttsv02622 Datasheet - Page 4

• Manufacturer Part Number: ttsv02622
• Description: Sts-24 Backplane Transceiver
• Manufacturer: ETC-unknow

Data Sheet
TTSV02622 STS-24 Backplane Transceiver
June 2003
List of Figures
Contents
Page
Figure 1. Byte Ordering on Input/Output Interface in STS-12 Mode ........................................................................ 2
Figure 2. Pin Diagram of 272-Pin PBGA (Bottom View)........................................................................................... 6
Figure 3. Suggested Schematic for 1.0 V and 1.4 V Reference Voltages.............................................................. 16
Figure 4. Alignment of Two STS-12 Streams ......................................................................................................... 17
Figure 5. Interior View of TTSV02622 .................................................................................................................... 18
Figure 6. Interconnect of Streams for FIFO Alignment........................................................................................... 19
Figure 7. Transmitter Block .................................................................................................................................... 22
Figure 8. Receiver Block ........................................................................................................................................ 24
Figure 9. Framer State Machine............................................................................................................................. 26
Figure 10. Pointer Mover State Machine ................................................................................................................ 30
Figure 11. LVDS Driver and Receiver and Associated Internal Components ........................................................ 51
Figure 12. LVDS Driver and Receiver .................................................................................................................... 51
Figure 13. LVDS Driver .......................................................................................................................................... 51
Figure 14. Input Parallel Port Timing ...................................................................................................................... 55
Figure 15. Transmitter Transport Delay.................................................................................................................. 56
Figure 16. Output Parallel Port Timing ................................................................................................................... 57
Figure 17. Protection Switch Timing....................................................................................................................... 58
Figure 18. Input Serial Port Timing......................................................................................................................... 59
Figure 19. Output Serial Port Timing ...................................................................................................................... 60
Figure 20. Write Transaction .................................................................................................................................. 61
Figure 21. Read Transaction .................................................................................................................................. 62
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Agere Systems Inc.