co661al-l Connect One Ltd., co661al-l Datasheet - Page 22

• Manufacturer Part Number: co661al-l
• Description: The Co661al-l Ichip Lan? Internet Controller? Is Part Of A Family Of Intelligent Peripheral Devices That Provides Internet Connectivity Solutions To A Myriad Of Embedded Devices
• Manufacturer: Connect One Ltd.

CLKO/HBT/Z6
-SER/PAR
LANINT
-CDH
-RIH
Z0
Z1/PCS
iChip LAN CO661AL-L Datasheet
Signal
Type
I/O
I/O
O
O
O
I
I
Pin No.
44
55
64
60
20
14
21
AT+i Configurable Pin:
CLKO (default): Clock Output. This pin provides a
clock-out to the system at the same frequency as
X1. During reset the clock out is disabled.
HBT: Heart Beat. Provides a 50% duty cycle, 40
mSec frequency square wave, when iChip firmware
is properly running. (Available from iChip
Firmware ver. 7.04).
In the future it may be changed to a GPIO.
This pin is configurable with the AT+iPN44
command (see AT+i Programmers Manual).
Serial/Parallel mode select. This pin is sampled on
the rising edge of the –RES signal. If it is LOW,
iChip LAN functions in Serial mode. Otherwise it
functions in Parallel mode.
LAN Interrupt. When HIGH, this signal indicates
that the LAN controller has information for iChip
LAN.
Received LAN Package: When LOW, this signal
indicates that iChip LAN received a legal packet
from the LAN controller.
During firmware update, -SER and -RCV are used
to display the firmware update status.
Serial Indicator Host: When LOW, this signal
indicates that iChip LAN has received a character
from the host.
During firmware update, -SER and -RCV are used
to display the firmware update status.
GPIO for future use. This pin should be Not
Connected.
In Serial mode: Z1 is available as a GPIO for
future use and should be left Not Connected.
In Parallel mode: PCS is used as a chip-select for
the parallel interface PAL.
Description
Pin Descriptions
5-5