am41pds3228d Meet Spansion Inc., am41pds3228d Datasheet - Page 3

• Manufacturer Part Number: am41pds3228d
• Description: 32 Mbit 2 M ? 16-bit Cmos 1.8 Volt-only, Simultaneous Operation Page Mode Flash Memory And 8 Mbit 1 M ? 8-bit/512 K ? 16-bit Static Ram Preliminary
• Manufacturer: Meet Spansion Inc.

GENERAL DESCRIPTION
The Am29PDS322D is a 32 Mbit, 1.8 V-only Flash
memory organized as 2,097,152 words of 16 bits
each. The device is designed to be programmed in
system with standard system 1.8 V V
d evice ca n a lso be re prog ra mm ed in stand ard
EPROM programmers.
The Am29PDS322D offers fast page access time of
40 ns with random access time of 100 ns (at 1.8 V to
2.2 V V
cessors without wait states. To eliminate bus conten-
tion the device has separate chip enable (CE), write
enable (WE), and output enable (OE) controls. The
page size is 4 words.
The device requires only a single 1.8 volt power sup-
ply for both read and write functions. Internally
generated and regulated voltages are provided for the
program and erase operations.
Simultaneous Read/Write Operations with
Zero Latency
The Simultaneous Read/Write architecture provides
simultaneous operation by dividing the memory
space into two banks. The device can improve overall
system performance by allowing a host system to pro-
gram or erase in one bank, then immediately and si-
multaneously read from the other bank, with zero
latency. This releases the system from waiting for the
completion of program or erase operations.
The device is divided as shown in the following table:
Am29PDS322D Features
The
KByte sector capable of being permanently locked by
AMD or customers. The SecSi Indicator Bit (DQ7) is
permanently set to a 1 if the part is factory locked,
and set to a 0 if customer lockable. This way, cus-
tomer lockable parts can never be used to replace a
factory locked part.
Factory locked parts provide several options. The
SecSi Sector may store a secure, random 16 byte
ESN (Electronic Serial Number), customer code (pro-
grammed through AMD’s ExpressFlash service), or
both. Customer Lockable parts may utilize the SecSi
Sector as bonus space, reading and writing like any
2
Quantity
SecSi (Secured Silicon) Sector
Bank 1 Sectors
8
7
CC
4 Mbits total
), allowing operation of high-speed micropro-
32 Kwords
4 Kwords
Size
Quantity
56
Bank 2 Sectors
28 Mbits total
CC
is an extra 64
supply. This
32 Kwords
P R E L I M I N A R Y
Size
Am41PDS3228D
other flash sector, or may permanently lock their own
code there.
DMS (Data Management Software) allows systems
to easily take advantage of the advanced architecture
of the simultaneous read/write product line by allowing
removal of EEPROM devices. DMS will also allow the
system software to be simplified, as it will perform all
functions necessary to modify data in file structures,
as opposed to single-byte modifications. To write or
update a particular piece of data (a phone number or
configuration data, for example), the user only needs
to state which piece of data is to be updated, and
where the updated data is located in the system. This
is a n a d v a n t a g e c o m p a re d to sy st e m s w h e re
user-written software must keep track of the old data
location, status, logical to physical translation of the
data onto the Flash memory device (or memory de-
vices), and more. Using DMS, user-written software
does not need to interface with the Flash memory di-
rectly. Instead, the user's software accesses the Flash
memory by calling one of only six functions. AMD pro-
vides this software to simplify system design and soft-
ware integration efforts.
The device offers complete compatibility with the
JEDEC single-power-supply Flash command set
standard. Commands are written to the command
register using standard microprocessor write timings.
Reading data out of the device is similar to reading
from other Flash or EPROM devices.
The host system can detect whether a program or
erase operation is complete by using the device sta-
tus bits: RY/BY# pin, DQ7 (Data# Polling) and
DQ6/DQ2 (toggle bits). After a program or erase cycle
has been completed, the device automatically returns
to the read mode.
The sector erase architecture allows memory sec-
tors to be erased and reprogrammed without affecting
the data contents of other sectors. The device is fully
erased when shipped from the factory.
Hardware data protection measures include a low
V
tions during power transitions. The hardware sector
protection feature disables both program and erase
operations in any combination of the sectors of mem-
ory. This can be achieved in-system or via program-
ming equipment.
The device offers two power-saving features. When
addresses have been stable for a specified amount of
time, the device enters the automatic sleep mode.
Th e system can also place the de vice into the
standby mode. Power consumption is greatly re-
duced in both modes.
CC
detector that automatically inhibits write opera-
May 13, 2002