m36l0r8060b1 STMicroelectronics, m36l0r8060b1 Datasheet - Page 8

• Manufacturer Part Number: m36l0r8060b1
• Description: 256 Mbit Multiple Bank, Multi-level, Burst Flash Memory And 64 Mbit Burst Psram, 1.8v Supply, Multi-chip Package
• Manufacturer: STMicroelectronics

M36L0R8060T1, M36L0R8060B1
PSRAM Upper Byte Enable (UB
Byte En-able, UB
Byte Data Inputs/Outputs (DQ8-DQ15) to or from
the upper part of the selected address during a
Write or Read operation.
PSRAM Lower Byte Enable (LB
Byte Enable, LB
Byte Data Inputs/Outputs (DQ0-DQ7) to or from
the lower part of the selected address during a
Write or Read operation.
If both LB
operation, the device will disable the data bus from
receiving or transmitting data. Although the device
will seem to be deselected, it remains in an active
mode as long as E
PSRAM Configuration Register Enable (CR
When this signal is driven High, V
tions load either the value of the Refresh Configu-
ration Register (RCR) or the Bus configuration
register (BCR).
V
supply to the internal core of the Flash memory. It
is the main power supply for all Flash memory op-
erations (Read, Program and Erase).
V
supply to the internal core of the PSRAM device. It
is the main power supply for all PSRAM opera-
tions.
V
power supply for the Flash I/O pins. This allows all
Outputs to be powered independently of the Flash
core power supplies, V
8/18
DDF
CCP
DDQF
Supply Voltage. V
Supply Voltage. V
Supply Voltage. V
P
and UB
P
P
, gates the data on the Lower
P
P
, gates the data on the Upper
remains Low.
are disabled (High) during an
DDF
DDF
CCP
and V
DDQF
provides the power
provides the power
CCP
P
P
IH
). The
). The
provides
, Write opera-
.
Upper
Lower
the
P
).
V
Flash control input and a Flash power supply pin.
The two functions are selected by the voltage
range applied to the pin.
If V
V
age lower than V
against Program or Erase, while V
ables these functions (see Tables
Characteristics for the relevant values). V
only sampled at the beginning of a Program or
Erase; a change in its value after the operation has
started does not have any effect and Program or
Erase operations continue.
If V
supply pin. In this condition V
until the Program/Erase algorithm is completed.
V
ence for all voltage measurements in the Flash
(core and I/O Buffers) and PSRAM chips. It must
be connected to the system ground.
Note: Each Flash memory device in a system
should have their supply voltage (V
the program supply voltage V
with a 0.1µF ceramic capacitor close to the pin
(high frequency, inherently low inductance ca-
pacitors should be as close as possible to the
package). See
Load
sufficient to carry the required V
and erase currents.
PPF
PPF
SS
PPF
PPF
Ground. V
is seen as a control input. In this case a volt-
Program Supply Voltage. V
Circuit. The PCB track widths should be
is kept in a low voltage range (0V to V
is in the range of V
SS
PPLK
Figure 6., AC Measurement
is the common ground refer-
gives an absolute protection
PPH
PPF
it acts as a power
PPF
PPF
must be stable
PPF
PPF
6
decoupled
and 7, DC
> V
DDF
is both a
program
PP1
PPF
DDQF
) and
en-
is
)