s72ns512rd0khfm0 Meet Spansion Inc., s72ns512rd0khfm0 Datasheet

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s72ns512rd0khfm0

Manufacturer Part Number
s72ns512rd0khfm0
Description
Mirrorbit Flash Memory And Dram128/256/512 Mb 8/16/32 M X 16 Bit , 1.8 Volt-onlymultiplexed Simultaneous Read/writeburst Mode Flash Memory128/256 Mb 8/16 M X 16 Bit Ddr Dram On Split Bus
Manufacturer
Meet Spansion Inc.
Datasheet
S72NS-R Based MCPs
MirrorBit
128/256/512 Mb (8/16/32 M x 16 bit), 1.8 Volt-only, Multiplexed
Simultaneous Read/Write, Burst Mode Flash Memory
128/256 Mb (8/16 M x 16 bit) DDR DRAM on Split Bus
Data Sheet (Advance Information)
Notice to Readers: This document states the current technical specifications regarding the Spansion
product(s) described herein. Each product described herein may be designated as Advance Information,
Preliminary, or Full Production. See
®
Flash Memory and DRAM
Publication Number S72NS-R_00
Notice On Data Sheet Designations
Revision 05
Issue Date May 9, 2008
for definitions.
S72NS-R Based MCPs Cover Sheet

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s72ns512rd0khfm0 Summary of contents

Page 1

S72NS-R Based MCPs ® MirrorBit Flash Memory and DRAM 128/256/512 Mb (8/16/ bit), 1.8 Volt-only, Multiplexed Simultaneous Read/Write, Burst Mode Flash Memory 128/256 Mb (8/ bit) DDR DRAM on Split Bus Data Sheet (Advance ...

Page 2

Notice On Data Sheet Designations Spansion Inc. issues data sheets with Advance Information or Preliminary designations to advise readers of product information or intended specifications throughout the product life cycle, including development, qualification, initial production, and full production. In all ...

Page 3

S72NS-R Based MCPs ® MirrorBit Flash Memory and DRAM 128/256/512 Mb (8/16/ bit), 1.8 Volt-only, Multiplexed Simultaneous Read/Write, Burst Mode Flash Memory 128/256 Mb (8/ bit) DDR DRAM on Split Bus Data Sheet (Advance ...

Page 4

... Product Selector Guide Device OPN S72NS128RD0AHBL0 S72NS128RD0AHBG0 S72NS128RD0AHBM0 S72NS256RD0AHBL0 S72NS256RD0AHBG0 S72NS256RD0AHBM0 S72NS512RD0AHGL0 S72NS512RD0AHGG0 S72NS512RD0AHGM0 S72NS512RD0KHFL0 S72NS512RD0KHFM0 S72NS512RE0AHGL0 S72NS512RE0AHGG0 S72NS512RE0KHFL0 S72NS512RE0KHFG0 Flash DDR DRAM Flash Speed DDR DRAM Density Density (MHz) Speed (MHz) 128 Mb ...

Page 5

Product Block Diagram F-RST# F-ACC F-CE# F-OE# F-WE# AVD# F-V SS D-RAS# D-CAS# D-BA0 D-BA1 D-CKE D-WE# D-CE# D-Amax - D-A0 D-V CC D-V CCQ Notes: 1. Amax indicates highest ...

Page 6

Connection Diagrams DNU D-TEST D-VSSQ B DNU D-VSS D-DQ13 C D-VCC D-DQ15 D-DQ14 D RFU A24 A22 A17 F A23 A19 A18 G F-CE# NC F-WE# H F-ACC F-VCC F-CLK J A16 ...

Page 7

Input/Output Descriptions Amax – A16 = ADQ15 – ADQ0 = F-CE# = F-OE# = F-WE# = F-VCC = F-VCCQ = F-VSS = F-RDY = = F-CLK = F-AVD# F-RST# = ...

Page 8

Ordering Information The order number (Valid Combination) is formed by the following: S72NS 256 Product Code Flash Family Density (Mb) 128 S72NS 256 512 Notes 1. Packing Type 0 is standard. Specify other options as ...

Page 9

Physical Dimensions 6.1 RLB133—133-ball Fine-Pitch Ball Grid Array (FBGA) 8.0 x 8.0 mm PACKAGE RLB 133 JEDEC N 8 8.00 mm PACKAGE SYMBOL MIN NOM ...

Page 10

RLD133—133-ball Fine-Pitch Ball Grid Array (FBGA) 11.0 x 10.0 mm PACKAGE JEDEC 11 10.00 mm PACKAGE SYMBOL MIN A 0.80 A1 0.18 A2 0.62 D 11.00 BSC. E 10.00 BSC. D1 6.50 BSC. E1 ...

Page 11

6.3 ALF128—128-ball Fine-Pitch Ball Grid Array (FBGA) 12.0 x 12.0 mm PACKAGE ALF 128 JEDEC 12. 12.00 mm PACKAGE SYMBOL MIN A 0.85 A1 0.38 A2 ...

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Revision History Section Revision 01 (August 7, 2007) Initial release Revision 02 (August 24, 2007) Global Updated package names and drawings for S72NS-R MCPs Revision 03 (January 15, 2008) Global Updated speed grades for all S72NS-R product offerings Revision ...

Page 13

Colophon The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, ...

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