hb28b128mm2 Renesas Electronics Corporation., hb28b128mm2 Datasheet - Page 76
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hb28b128mm2
Manufacturer Part Number
hb28b128mm2
Description
Multimediacard 16 Mbyte/32 Mbyte/64 Mbyte/128 Mbyte
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.HB28B128MM2.pdf
(90 pages)
- Current page: 76 of 90
- Download datasheet (679Kb)
HB28H016/D032/B064/B128MM2
Cyclic Redundancy Check (CRC)
The CRC is intended for protecting MultiMediaCard commands, responses and data transfer against
transmission errors on the MultiMediaCard bus. One CRC is generated for every command and checked
for every response on the CMD line. For data blocks one CRC per transferred block is generated. The
CRC is generated and checked as described in the following.
• CRC7
The CRC7 check is used for all commands, for all responses except type R3, and for the CSD and CID
registers. The CRC7 is a 7-bit value and is computed as follows:
All CRC registers are initialized to zero. The first bit is the most left bit of the corresponding bitstring (of
the command, response, CID or CSD). The degree n of the polynomial is the number of CRC protected
bits decreased by one. The number of bits to be protected is 40 for commands and responses (n = 39), and
120 for the CSD and CID (n = 119).
• CRC16
The CRC16 is used for payload protection in block transfer mode. The CRC check sum is a 16-bit value
and is computed as follows:
All CRC registers are initialized to zero. The first bit is the first data bit of the corresponding block. The
degree n of the polynomial denotes the number of bits of the data block decreased by one (e.g. n = 4095 for
a block length of 512 bytes). The generator polynomial G(x) is a standard CCITT polynomial. The code
has a minimal distance d=4 and is used for a payload length of up to 2048 Bytes (n <= 16383).
Rev.5.0, Jan. 2003, page 74 of 88
generator polynomial: G(x) = x
M(x) = (first bit) * x
CRC[6...0] = Remainder [(M(x) * x
generator polynomial: G(x) = x
M(x) = (first bit) * x
CRC[15...0] = Remainder [(M(x) * x
n
n
+ (second bit) * x
+ (second bit) * x
7
16
+ x
+ x
7
)/G(x)]
16
3
12
) / G(x)]
+ 1
n-1
n-1
+x
+...+ (last bit) * x
+...+ (last bit) * x
5
+ 1,
0
0
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