srf-2724cs RF Micro Devices, srf-2724cs Datasheet - Page 20

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srf-2724cs

Manufacturer Part Number
srf-2724cs
Description
2.4ghz Low-if 1.5mbps Fsk Transceiver
Manufacturer
RF Micro Devices
Datasheet
SRF-2724CS
TPC - Register 0, Bit 7
Transmit Power Control: When the AOUT bit is low, this bit controls the state of the open-drain output pin. Although this bit can
be changed at any time, the AOUT pin only changes state at the falling edge of RXON (see Table 10).
TXM - Register 0, Bit 8
Transmit Mode: This bit controls the TX RF buffer state timing mode. It must be reset to 0 for normal operation (see Table 11).
LVLO - Register 0, Bit 10
.Low Voltage Lock Out: The LVLO bit enables a transmit low voltage lockout latch, which shuts off the transmitter by de-assert-
ing the PAON output. This latch is set if the supply voltage drops below 2.65V and is reset when the RXON control input goes
high (see Table 12).
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Table 10: TPC Pin State
Table 11: TXM Mode
Table 12: LVLO Operation
LVLO
TXM
TPC
0
1
0
1
0
1
PAON de-asserted when VCCA<2.65V, Reset
RF Output Always On in TX Mode
TXRF Buffer Behavior
RF Output Follows PAON
PAON Behavior
PAON Undisturbed
TPC Pin State
Pulled to Ground
High Impedance
by RXON high
Proposed
Prelim DS090410

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