mt18htf25672fd Micron Semiconductor Products, mt18htf25672fd Datasheet - Page 10

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mt18htf25672fd

Manufacturer Part Number
mt18htf25672fd
Description
Ddr2 Sdram Fbdimm
Manufacturer
Micron Semiconductor Products
Datasheet
Table 15: Serial Presence-Detect EEPROM AC Operating Conditions (Continued)
Serial Presence-Detect Data
PDF: 09005aef81a2f237
htf18c128_256x72fdy.pdf - Rev. D 12/09 EN
Parameter/Condition
SDA and SCL rise time
SCL clock frequency
Data-in setup time
Start condition setup time
Stop condition setup time
WRITE cycle time
Notes:
For the latest serial presence-detect data, refer to Micron's SPD page:
SPD.
1. To avoid spurious start and stop conditions, a minimum delay is placed between SCL = 1
2. This parameter is sampled.
3. For a restart condition, or following a WRITE cycle.
4. The SPD EEPROM WRITE cycle time (
and the falling or rising edge of SDA.
write sequence to the end of the EEPROM internal ERASE/PROGRAM cycle. During the
WRITE cycle, the EEPROM bus interface circuit is disabled, SDA remains HIGH due to pull-
up resistance, and the EEPROM does not respond to its slave address.
1GB, 2GB (x72, DR) 240-Pin DDR2 SDRAM FBDIMM
10
Symbol
t
t
t
SU:DAT
SU:STO
SU:STA
t
f
WRC
SCL
t
R
t
Micron Technology, Inc. reserves the right to change products or specifications without notice.
WRC) is the time from a valid stop condition of a
Min
100
0.6
0.6
Serial Presence-Detect
Max
400
0.3
10
© 2005 Micron Technology, Inc. All rights reserved.
www.micron.com/
Units
kHz
ms
µs
ns
µs
µs
Notes
2
3
4

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