mt18jsf25672py-1g1 Micron Semiconductor Products, mt18jsf25672py-1g1 Datasheet - Page 17

• Manufacturer Part Number: mt18jsf25672py-1g1
• Description: 2gb X72, Ecc, Sr 240-pin Ddr3 Sdram Rdimm
• Manufacturer: Micron Semiconductor Products

Table 20:
Figure 4:
PDF: 09005aef8303ca34/Source: 09005aef8303ca7a
JSF18C256x72P.fm - Rev. A 4/08 EN
10:9
Bit
5
6
7
8
Description
Clear event
0: No effect
1: Clears the event when the temperature sensor is in
the interrupt mode
Alarm window lock bit
0: Alarm trips are not locked and can be changed
1: Alarm trips are locked and cannot be changed
Critical trip lock bit
0: Critical trip is not locked and can be changed
1: Critical trip is locked and cannot be changed
Shutdown mode
0: Enabled
1: Shutdown
Hysteresis enable
00: Disable
01: Enable at 1.5°C
10: Enable at 3°C
11: Enable at 6°C
Above window bit
Configuration Register Bit Descriptions (continued)
Hysteresis
Below window bit
Notes:
1. T
2. T
3. Hyst is the value set in the hysteresis bits of the configuration register.
T
T
H
L
H
L
is the value set in the alarm temperature lower boundary trip register.
is the value set in the alarm temperature upper boundary trip register.
2
1
Temperature Sensor with Serial Presence-Detect EEPROM
2GB (x72, ECC, SR) 240-Pin DDR3 SDRAM RDIMM
17
Notes
The shutdown mode is a power-saving mode that
disables the temperature sensor.
When enabled, a hysteresis is applied to temperature
movement around the trip points. As an example, if the
hysteresis register is enabled to a delta of 6°C, the
preset trip points will toggle when the temperature
reaches the programmed value. These values will reset
when the temperature drops below the trip points
minus the set hysteresis level. In this case, this would be
critical temperature minus 6°C.
The hysteresis is applied both to the above alarm
window and the below alarm window bits found in the
read-only temperature register. EVENT# is also affected
by this register.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T
H
-
Hyst
3
©2008 Micron Technology, Inc. All rights reserved
T
L
-
Hyst