mt8vddt3264hdg-335 Micron Semiconductor Products, mt8vddt3264hdg-335 Datasheet - Page 9

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mt8vddt3264hdg-335

Manufacturer Part Number
mt8vddt3264hdg-335
Description
128mb, 256mb, 512mb, 1gb X64, Dr 200-pin Ddr Sodimm
Manufacturer
Micron Semiconductor Products
Datasheet
I
Table 11:
PDF: 09005aef80765fab/Source: 09005aef806e1d28
DD8C16_32_64_128x64HD.fm - Rev. D 11/07 EN
Parameter/Condition
Operating one bank active-precharge current:
t
changing once per clock cycle; Address and control inputs
changing once every two clock cycles
Operating one bank active-read-precharge current:
BL = 4;
and control inputs changing once per clock cycle
Precharge power-down standby current: All device banks
idle; Power-down mode;
Idle standby current: CS# = HIGH; All device banks idle;
t
inputs changing once per clock cycle; V
and DQS
Active power-down standby current: One device bank
active; Power-down mode;
Active standby current: CS# = HIGH; CKE = HIGH; One
device bank active;
DM, and DQS inputs changing twice per clock cycle; Address
and other control inputs changing once per clock cycle
Operating burst READ current: BL = 2; Continuous burst
READs; One device bank active; Address and control inputs
changing once per clock cycle;
Operating burst WRITE current: BL = 2; Continuous burst
WRITEs; One device bank active; Address and control inputs
changing once per clock cycle;
DQS inputs changing twice per clock cycle
Auto refresh current
Self refresh current: CKE ≤ 0.2V
Operating bank interleave READ current: Four device
bank interleaving READs (BL = 4) with auto precharge;
t
change only during active READ or WRITE commands
DD
RC =
CK =
RC =
Specifications
t
t
t
RC (MIN);
RC (MIN);
CK (MIN); CKE = HIGH; Address and other control
t
RC =
t
I
Values are shown for the MT46V8M16 DDR SDRAM only and are computed from values specified in the
128Mb (8 Meg x 16) component data sheet
RC (MIN);
DD
t
t
CK =
CK =
Specifications and Conditions – 128MB
Notes:
t
RC =
t
t
CK (MIN); DQ, DM, and DQS inputs
CK (MIN); Address and control inputs
t
CK =
t
t
CK =
RAS (MAX);
t
1. Value calculated as one module rank in this operating condition; all other module ranks are
2. Value calculated reflects all module ranks in this operating condition.
CK =
t
CK (MIN); I
t
t
t
in I
CK =
CK =
CK (MIN); CKE = LOW
t
CK (MIN); CKE = LOW
DD
2P (CKE LOW) mode.
t
t
CK (MIN); I
CK (MIN); DQ, DM, and
128MB, 256MB, 512MB, 1GB (x64, DR): 200-Pin DDR SODIMM
IN
t
CK =
= V
OUT
t
t
REFC =
REFC = 15.625µs
REF
t
CK (MIN); DQ,
= 0mA; Address
for DQ, DM,
OUT
t
RFC (MIN)
= 0mA
9
Symbol
I
I
I
I
I
I
I
DD
DD
DD
I
I
DD
DD
DD
I
I
I
DD
DD
DD
DD
DD
DD
4W
3N
5A
2P
3P
4R
2F
0
1
5
6
7
1
1
2
2
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2
2
2
1
2
2
1
2,120
1,552
-40B
512
552
400
200
400
752
732
24
80
32
Electrical Specifications
2,120
1,512
-335
512
552
360
200
400
592
632
24
40
24
©2004 Micron Technology, Inc. All rights reserved
-26A/
2,000
1,512
-265
452
512
320
160
360
552
532
24
40
16
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA

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