mt8vddt3264ag-265 Micron Semiconductor Products, mt8vddt3264ag-265 Datasheet - Page 12

• Manufacturer Part Number: mt8vddt3264ag-265
• Description: 128mb, 256mb, 512mb X64, Sr 184-pin Ddr Sdram Udimm
• Manufacturer: Micron Semiconductor Products

Table 12:
PDF: 09005aef80867ab3/Source: 09005aef80867a99
DD8C16_32_64x64A.fm - Rev. I 11/07 EN
Parameter/Condition
Operating one bank active-precharge current:
t
cycle; Address and control inputs changing once every two clock
cycles
Operating one bank active-read-precharge current: Active-read
precharge; BL = 4;
Address and control inputs changing once per clock cycle
Precharge power-down standby current: All device banks idle;
Power-down mode;
Idle standby current: CS# = HIGH; All device banks idle;
t
changing once per clock cycle; V
Active power-down standby current: One device bank active;
Power-down mode;
Active standby current: CS# = HIGH; CKE = HIGH; One device bank
active;
changing twice per clock cycle; Address and other control inputs
changing once per clock cycle
Operating burst read current: BL = 2; Continuous burst reads; One
device bank active; Address and control inputs changing once per
clock cycle;
Operating burst write current: BL = 2; Continuous burst writes;
One device bank active; Address and control inputs changing once
per clock cycle;
twice per clock cycle
Auto refresh current
Self refresh current: CKE ≤ 0.2V
Operating bank interleave read current: Four device bank
interleaving reads; BL = 4 with auto precharge;
t
active READ or WRITE commands
CK =
CK =
CK =
t
t
t
CK (MIN); DQ, DM, and DQS inputs changing once per clock
CK (MIN); CKE = HIGH; Address and other control inputs
CK (MIN); Address and control inputs change only during
t
RC =
t
CK =
t
RAS (MAX);
I
Values are shown for the MT46V64M8 DDR SDRAM only and are computed from values specified in the
512Mb (64 Meg x 8) component data sheet
DD
t
CK =
t
CK (MIN); I
Specifications and Conditions – 512MB
t
RC =
t
t
CK =
CK =
t
CK (MIN); DQ, DM, and DQS inputs changing
t
RC (MIN);
t
t
t
CK =
CK (MIN); CKE = LOW
CK (MIN); CKE = LOW
OUT
IN
t
CK (MIN); DQ, DM, and DQS inputs
= 0mA
= V
t
CK =
REF
128MB, 256MB, 512MB (x64, SR) 184-Pin DDR SDRAM UDIMM
for DQ, DM, and DQS
t
CK (MIN); I
t
RC =
t
t
t
REFC =
REFC = 7.8125µs
RC =
OUT
t
RC (MIN);
t
RC (MIN);
= 0mA;
t
RFC (MIN)
12
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Symbol
I
I
I
I
I
I
I
DD
I
I
DD
DD
I
DD
I
I
DD
DD
DD
DD
DD
DD
DD
DD
4W
3N
5A
4R
2P
2F
3P
0
1
5
6
7
1,240
1,480
1,520
1,560
2,760
3,600
-40B
440
360
480
40
88
40
Electrical Specifications
1,040
1,280
1,320
1,400
2,320
3,240
-335
360
280
400
40
80
40
©2003 Micron Technology, Inc. All rights reserved.
1,040
1,280
1,320
1,240
2,320
3,200
-262
360
280
400
40
80
40
-26A/
1,160
1,160
1,080
2,240
2,800
-265
920
320
240
360
40
80
40
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA