m464s1724kus Samsung Semiconductor, Inc., m464s1724kus Datasheet - Page 10

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m464s1724kus

Manufacturer Part Number
m464s1724kus
Description
Sdram Unbuffered Sodimm
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
12.0 AC Operating Test Conditions
13.0 OPERATING AC PARAMETER
Note :
1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and then rounding off to the next higher
2. Minimum delay is required to complete write.
3. All parts allow every cycle column address change.
4. In case of row precharge interrupt, auto precharge and read burst stop.
5. In 100MHz and below 100MHz operating conditions, tRDL=1CLK and tDAL=1CLK + 20ns is also supported.
6. tRC =tRFC, tRDL = tWR.
128MB Unbuffered SODIMM
AC input levels (V
Input timing measurement reference level
Input rise and fall time
Output timing measurement reference level
Output load condition
Row active to row active delay
RAS to CAS delay
Row precharge time
Row active time
Row cycle time
Last data in to row precharge
Last data in to Active delay
Last data in to new col. address delay
Last data in to burst stop
Col. address to col. address delay
Number of valid output data
SAMSUNG recommends tRDL=2CLK and tDAL=2CLK + tRP.
integer.
Output
(Fig. 1) DC output load circuit
870Ω
IH
Parameter
/V
Parameter
IL
)
3.3V
1200Ω
50pF
CAS latency=3
CAS latency=2
V
V
OH
OL
(DC) = 0.4V, I
(DC) = 2.4V, I
tRAS(max)
tRRD(min)
tRCD(min)
tCCD(min)
tRAS(min)
tRDL(min)
tDAL(min)
tCDL(min)
tBDL(min)
tRP(min)
tRC(min)
Symbol
10 of 13
OL
OH
= 2MA
= -2MA
See Fig. 2
tr/tf = 1/1
2.4/0.4
2 CLK + tRP
Value
1.4
1.4
Version
Output
100
7A
15
20
20
45
65
2
1
1
1
2
1
(AC operating conditions unless otherwise noted)
(Fig. 2) AC output load circuit
Rev. 1.2 August 2008
(V
Z0 = 50Ω
DD
= 3.3V ± 0.3V, T
Unit
CLK
CLK
CLK
CLK
ns
ea
ns
ns
ns
ns
us
-
V
Unit
SDRAM
A
50Ω
ns
TT
50pF
V
V
V
= 0 to 70°C)
= 1.4V
Note
1
1
1
1
1
2
2
2
3
4

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