we128k8-300cqa White Electronic Designs Corporation, we128k8-300cqa Datasheet - Page 5

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we128k8-300cqa

Manufacturer Part Number
we128k8-300cqa
Description
512kx8 Cmos Eeprom, We512k8-xcx, 5962-93091
Manufacturer
White Electronic Designs Corporation
Datasheet
READ
Figure 5 shows Read cycle waveforms. A read cycle begins
with selection address, chip select and output enable. Chip
select is accomplished by placing the CS# line low. Output
enable is done by placing the OE# line low. The memory
White Electronic Designs Corp. reserves the right to change products or specifi cations without notice.
May 2000
Rev. 1
Parameter
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Hold from Address Change, OE# or CS#
Output Enable to Output Valid
Chip Select or Output Enable to High Z Output
Parameter
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Hold from Address Change, OE# or CS#
Output Enable to Output Valid
Chip Select or Output Enable to High Z Output
NOTE:
OE# may be delayed up to t
or by t
ACC
-t
OE
after an address change without impact on t
White Electronic Designs
ACS
-t
OE
after the falling edge of CS# without impact on t
ADDRESS
OUTPUT
AC READ CHARACTERISTICS (See Figure 5)
CS#
OE#
FOR WE256K8-XCX and WE128K8-XCX
ACC
FIGURE 5 – READ WAVEFORMS
.
V
CC
= 5.0V, V
Symbol
Symbol
FOR WE512K8-XCX
tacc
tacs
tacc
tacs
toh
toe
toh
toe
trc
tdf
trc
tdf
SS
OE
= 0V, -55°C ≤ T
Min
150
0
5
-150
Min
150
0
places the selected data byte on I/O0 through I/O7 after the
access time. The output of the memory is placed in a high
impedance state shortly after either the OE# line or CS# line
is returned to a high level.
Max
150
150
85
70
-150
A
≤ +125°C
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
Min
200
0
-200
Max
150
150
85
70
Max
200
200
85
70
WE512K8, WE256K8,
Min
250
0
-250
Min
200
0
Max
250
250
100
70
-200
WE128K8-XCX
Min
300
0
-300
Max
200
200
85
70
Max
300
300
125
70
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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