m393t1k66aza Samsung Semiconductor, Inc., m393t1k66aza Datasheet
m393t1k66aza
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m393t1k66aza Summary of contents
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... RDIMM DDR2 Registered SDRAM MODULE 240pin Registered Module based on 2Gb A-die 60FBGA and 83FBGA with Lead-Free and Halogen-Free INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHER- WISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOL- OGY. ALL INFORMATION IN THIS DOCUMENT IS PROVIDED ON AS " ...
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... Input AC Logic Level 9.5 AC Input Test Conditions 10.0 IDD Specification Parameters Definition ...............................................................................11 11.0 Operating Current Table : .......................................................................................................12 ......................................................................................................................12 11.1 M393T1K66AZA 11.2 M393T1K66AZA - considering Register and PLL current value .......................................................................................................................13 11.3 M393T5263AZA 11.4 M393T5263AZA - considering Register and PLL current value 12.0 Input/Output Capacitance .......................................................................................................14 13.0 Electrical Characteristics & AC Timing for DDR2-800/667 ...................................................14 13.1 Refresh Parameters by Device Density 13 ...
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RDIMM Revision History Revision Month Year 1.0 December 2007 1.1 July 2008 1.2 August 2008 - Initial Release - Applied JEDEC update(JESD79-2E timing table - Added up 2Rx8 product DDR2 SDRAM History Rev. 1.2 August ...
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... RDIMM 1.0 DDR2 Registered DIMM Ordering Information Part Number Density M393T1K66AZA-CF7/E6 8GB M393T5263AZA-CF7/E6 8GB Note : 1. “Z” of Part number(11th digit) stands for Lead-Free and RoHS compliant products. 2. “A” of Part number(12th digit) stands for Parity Register products. 2.0 Features • Performance range Speed@CL3 ...
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... RESET (Pin 18) is connected to both OE of PLL and Reset of register. 2. The Test pin (Pin 102) is reserved for bus analysis probes and is not connected on normal memory modules (DIMMs) 3. NC/Err_Out ( Pin 55) and NC/Par_In (Pin 68) are for optional function to check address and command parity. ...
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RDIMM 6.0 Input/Output Function Description Symbol Type Input CK0 Positive line of the differential pair of system clock inputs that drives input to the on-DIMM PLL. Input CK0 Negative line of the differential pair of system clock inputs that drives ...
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... RDIMM 7.0 Functional Block Diagram : 7.1 8GB, 1Gx72 Module - M393T1K66AZA (populated as 2 rank of x4 DDR2 SDRAMs RS1 RS0 DQS0 DQS0 DM CS DQS DQS DM/ CS DQS DQS DQ0 I/O 0 I/O 0 DQ1 I I/O 1 DQ2 I/O 2 I/O 2 DQ3 I/O 3 I/O 3 DQS1 DQS1 DM CS DQS DQS DM/ DQ8 I/O 0 I/O 0 DQ9 ...
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... RDIMM 7.2 4GB, 512Mx72 Module - M393T5263AZA (populated as 2 rank of x8 DDR2 SDRAMs) RS1 RS0 DQS0 DQS0 DM0/DQS9 NC/DQS9 DM/ NU/ CS DQS DQS RDQS RDQS DQ0 I/O 0 DQ1 I DQ2 I/O 2 DQ3 I/O 3 DQ4 I/O 4 DQ5 I/O 5 DQ6 I/O 6 DQ7 I/O 7 DQS1 DQS1 DM1/DQS10 NC/DQS10 DM/ NU/ CS DQS DQS RDQS RDQS DQ8 ...
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RDIMM 8.0 Absolute Maximum DC Ratings Symbol Parameter Voltage on V pin relative Voltage on V pin relative DDQ DDQ Voltage on V pin relative DDL DDL Voltage on ...
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RDIMM 9.2 Operating Temperature Condition Symbol T Operating Temperature OPER Note : 1. Operating Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions, please refer to JESD51.2 standard ...
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RDIMM 10.0 IDD Specification Parameters Definition (IDD values are for full operating range of Voltage and Temperature) Symbol Operating one bank active-precharge current; IDD0 tCK = tCK(IDD), tRC = tRC(IDD), tRAS = tRASmin(IDD); CKE is HIGH HIGH between ...
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... IDD3P-F IDD3P-S IDD3N IDD4W IDD4R IDD5B IDD6* Normal IDD7 * Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap. 11.2 M393T1K66AZA - considering Register and PLL current value Symbol F7 (DDR2-800@CL=6) IDD0 IDD1 IDD2P IDD2Q IDD2N IDD3P-F IDD3P-S ...
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... IDD3P-S IDD3N IDD4W IDD4R IDD5B IDD6* Normal IDD7 * IDD6 = DRAM current + standby current of PLL and Register ** Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap. E6 (DDR2-667@CL=5) 1,575 1,800 270 990 1,080 900 324 1,440 ...
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... Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin Speed Bin (CL - tRCD - tRP) Parameter min tCK, CL=3 tCK, CL=4 3.75 tCK, CL=5 tCK, CL=6 2.5 tRCD tRP tRC tRAS Min Symbol M393T1K66AZA CCK - CI1 - CI2 - CIO - = 1.8V + 0.1V) DD Symbol tRFC 0 °C ≤ T ≤ 85°C CASE tREFI 85 °C < T ≤ ...
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RDIMM 13.3 Timing Parameters by Speed Grade (Refer to notes for informations related to this table at the component datasheet) Parameter DQ output access time from CK/CK DQS output access time from CK/CK Average clock HIGH pulse width Average clock ...
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RDIMM Parameter Four Activate Window for 1KB page size products Four Activate Window for 2KB page size products CAS to CAS command delay Write recovery time Auto precharge write recovery + precharge time Internal write to read command delay Internal ...
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... RDIMM 14.0 Physical Dimensions : 14.1 st.1Gbx4 based 1Gx72 Module (2 Ranks) - M393T1K66AZA (2) 2.50 63.00 5.00 4.00 2.50 1.50±0.10 Detail A The used device is st.1G x4 DDR2 SDRAM. DDR2 SDRAM Part NO : K4T4G264QA 133.35 131.35 128.95 PLL B A 55.00 4.00 0.80±0.05 3.80 0.20 1.00 Detail DDR2 SDRAM Units : Millimeters 7.55 Max 30.00 3.10 max 1.27 ± 0.10 3.00 4.00 Rev. 1.2 August 2008 ...
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... RDIMM 14.2 256Mx8 based 512Mx72 Module (2 Ranks) (2) 2.50 63.00 5.00 4.00 2.50 1.50±0.10 Detail A The used device is 256M x8 DDR2 SDRAM, FBGA. DDR2 SDRAM Part NO : K4T2G084QA - M393T5263AZA 133.35 131.35 128.95 PLL B A 55.00 4.00 3.80 1.00 Detail DDR2 SDRAM Units : Millimeters 4.00 Max 30.00 1.0 max 1.27 ± 0.10 3.00 0.80±0.05 0.20 4.00 Rev. 1.2 August 2008 ...
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RDIMM 15.0 240 Pin DDR2 Registered DIMM Clock Topology CK0 120 ohms CK0 120 ohms C Note : 1. The clock delay from the input of the PLL clock to the input of any DDR2 SDRAM or register will be ...