m470t5267az3 Samsung Semiconductor, Inc., m470t5267az3 Datasheet - Page 12
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m470t5267az3
Manufacturer Part Number
m470t5267az3
Description
Ddr2 Unbuffered Sodimm
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.M470T5267AZ3.pdf
(17 pages)
12.0 Input/Output Capacitance
* DM is internally loaded to match DQ and DQS identically.
13.0 Electrical Characteristics & AC Timing for DDR2-800/667/533
13.1 Refresh Parameters by Device Density
13.2 Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin
Input capacitance, CK and CK
Input capacitance, CKE , CS, Addr, RAS, CAS, WE
Input/output capacitance, DQ, DM, DQS, DQS
Refresh to active/Refresh command time
Average periodic refresh interval
SODIMM
Bin(CL - tRCD - tRP)
Parameter
tCK, CL=3
tCK, CL=4
tCK, CL=5
tCK, CL=6
(0 °C < T
Speed
tRCD
tRAS
tRC
tRP
Parameter
OPER
< 95 °C; V
Parameter
Non-ECC
3.75
min
2.5
15
15
60
45
DDQ
3
-
DDR2-800(F7)
= 1.8V + 0.1V; V
6 - 6- 6
tRFC
tREFI
70000
max
8
8
8
-
-
-
-
DD
85 °C < T
0 °C ≤ T
Symbol
= 1.8V + 0.1V)
CASE
CASE
12 of 17
3.75
min
15
15
60
45
5
3
CIO(667/800)
-
≤ 85°C
≤ 95°C
CIO(533)
DDR2-667(E6)
Symbol
CCK
CI
5 - 5 - 5
256Mb
70000
max
7.8
3.9
75
8
8
8
-
-
-
-
512Mb
105
7.8
3.9
Min
-
-
-
-
M470T5267AZ(H)3
3.75
3.75
min
15
15
60
45
5
-
Rev. 1.2 September 2008
DDR2-533(D5)
127.5
1Gb
7.8
3.9
4 - 4 - 4
(V
DD
DDR2 SDRAM
=1.8V, V
Max
2Gb
48
42
10
195
7.8
3.9
9
70000
max
8
8
8
-
-
-
-
DDQ
327.5
4Gb
=1.8V, T
7.8
3.9
Units
pF
Units
A
Units
=25
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
o
C)