hys64t128020edv-2.5-c2 Qimonda, hys64t128020edv-2.5-c2 Datasheet - Page 13
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hys64t128020edv-2.5-c2
Manufacturer Part Number
hys64t128020edv-2.5-c2
Description
200-pin 1.5v Ddr2 Sdram So-dimm Modules So-dimm Sdram
Manufacturer
Qimonda
Datasheet
1.HYS64T128020EDV-2.5-C2.pdf
(33 pages)
1) Operating Temperature is the case surface temperature on the center / top side of the DRAM.
2) The operating temperature range are the temperatures where all DRAM specification will be supported. During operation, the DRAM case
3) Above 85 °C the Auto-Refresh command interval has to be reduced to
4) When operating this product in the 85 °C to 95 °C T
3.2
1) Under all conditions,
2) Peak to peak AC noise on
3) Input voltage for any connector pin under test of 0 V ≤
Rev. 0.50, 2008-01
01242008-QE4B-HF08
Symbol
Parameter
Device Supply Voltage
Output Supply Voltage
Input Reference Voltage
SPD Supply Voltage
DC Input Logic High
DC Input Logic Low
In / Output Leakage Current
T
CASE
temperature must be maintained between 0 - 95 °C under all other specification parameters.
setting EMR(2) bit A7 to “1”. When the High Temperature Self Refresh is enabled there is an increase of
Operating Temperature
Parameter
DC Operating Conditions
V
DDQ
must be less than or equal to
V
REF
may not exceed ± 2%
Symbol
V
V
V
V
V
V
I
L
DD
DDQ
REF
DDSPD
IH(DC)
IL (DC
)
CASE
Values
Min.
1.45
1.45
0.49 ×
1.45
V
– 0.30
– 5
V
V
REF
REF
IN
temperature range, the High Temperature Self Refresh has to be enabled by
V
DD
≤
+ 0.125
(DC).
V
V
DDQ
DDQ
13
V
Supply Voltage Levels and DC Operating Conditions
+ 0.3 V; all other pins at 0 V. Current is per pin
REF
DRAM Component Operating Temperature Range
is also expected to track noise in
t
REFI
0.5 ×
—
—
—
Typ.
1.5
1.5
—
= 3.9 µs
Rating
Min.
0
V
HYS64T[128/256]020EDV–[25F/2.5/3S](–)C2
DDQ
Small Outline DDR2 SDRAM Modules
Max.
95
Max.
1.9
1.9
0.51 ×
3.6
V
V
5
DDQ
REF
– 0.125
+ 0.3
Advance Internet Data Sheet
V
DDQ
V
I
DDQ
DD6
Unit
°C
.
by approximately 50%
Unit
V
V
V
V
V
V
µA
TABLE 10
TABLE 11
Note
1)2)3)4)
Note
1)
2)
3)