hys64t512022edl-25f-a Qimonda, hys64t512022edl-25f-a Datasheet - Page 4
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hys64t512022edl-25f-a
Manufacturer Part Number
hys64t512022edl-25f-a
Description
200-pin Dual-die Small-outline Ddr2 Sdramm Modules
Manufacturer
Qimonda
Datasheet
1.HYS64T512022EDL-25F-A.pdf
(33 pages)
1.2
The Qimonda HYS64T512022EDL–[2.5/25F/3S]–A module
family are Small-Outline DIMM modules “SO-DIMMs” with 30
mm height based on DDR2 technology. DIMMs are available
as non-ECC modules in 512M × 64 (4GB) in organization
and density, intended for mounting into 200-pin connector
sockets.
1) For detailed information regarding Product Type of Qimonda please see chapter "Product Type Nomenclature" of this data sheet.
2) The Compliance Code is printed on the module label and describes the speed grade, for example "PC2–6400S–555–12–D0" where 6400S
1) DDP Dual-Die Package
1) Green Product
2) For a detailed description of all functionalities of the DRAM components on these modules see the component data sheet.
Rev. 1.00, 2008-07
07032008-OVFG-HMBJ
Product Type
PC2-6400 (5-5-5)
HYS64T512022EDL-25F-A
PC2-6400 (6-6-6)
HYS64T512022EDL-2.5-A
PC2-5300 (5-5-5)
HYS64T512022EDL-3S-A
DIMM
Density
4GB
Product Type
HYS64T512022EDL
means Small-Outline DIMM modules with 6.40 GB/sec Module Bandwidth and "555–12" means Column Address Strobe (CAS) latency
=5, Row Column Delay (RCD) latency = 5 and Row Precharge (RP) latency = 5 using the Industry Standard SPD Revision 1.2 and
produced on the Raw Card "D".
1)
1)2)
Module
Organization
512M × 64
Description
Compliance Code
4GB 2R×8 PC2–6400S–555–12–D0
4GB 2R×8 PC2–6400S–666–12–D0
4GB 2R×8 PC2–5300S–555–12–D0
DRAM Components
HYB18T4G802AF
Memory
Ranks
2
2)
ECC/
Non-ECC
Non-ECC
1)
4
The memory array is designed with 4Gbit (2Gbit Dual-Dies)
Double-Data-Rate-Two
Decoupling capacitors are mounted on the PCB board. The
DIMMs feature serial presence detect based on a serial
E
128 bytes are programmed with configuration data and are
write protected; the second 128 bytes are available to the
customer.
2
PROM device using the 2-pin I
# of SDRAMs # of row/bank/column
8 DDP
DRAM Density
2 ×2Gbit
Description
2 Ranks, Non-ECC
2 Ranks, Non-ECC
2 Ranks, Non-ECC
1)
Small Outline DDR2 SDRAM Modules
HYS64T512022EDL–[2.5/25F/3S]–A
bits
15/3/10
(DDR2)
Components on Modules
DRAM Organisation
2 ×256M × 8
Ordering Information
SDRAM Technology
2Gbit (×8)
2Gbit (×8)
2Gbit (×8)
Synchronous
2
C protocol. The first
Internet Data Sheet
Address Format
TABLE 2
TABLE 3
TABLE 4
Raw
Card
D
DRAMs.